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Implementation of a configuration server for a hardware SNTP synchronization platform based on FPGA

dc.creatorQuirós Carmona, Juanes
dc.creatorViejo Cortés, Juliánes
dc.creatorMillán Calderón, Alejandroes
dc.creatorMuñoz Rivera, Alejandroes
dc.creatorVillar de Ossorno, José Ignacioes
dc.creatorGuerrero Martos, Davides
dc.date.accessioned2021-02-12T10:19:35Z
dc.date.available2021-02-12T10:19:35Z
dc.date.issued2011
dc.identifier.citationQuirós Carmona, J., Viejo Cortés, J., Millán Calderón, A., Muñoz Rivera, A., Villar de Ossorno, J.I. y Guerrero Martos, D. (2011). Implementation of a configuration server for a hardware SNTP synchronization platform based on FPGA. En SPL 2011: VII Southern Conference on Programmable Logic (239-244), Córdoba, Argentina: IEEE Computer Society.
dc.identifier.isbn978-1-4244-8847-6es
dc.identifier.urihttps://hdl.handle.net/11441/104887
dc.description.abstractThis paper presents the implementation of a configuration server for a SNTP synchronization platform which implements accurate synchronization solutions for Remote Terminal Units commonly used in industrial control processes. The configuration server provides settings to others platform devices using the BOOTP protocol and an interface that allow to administer the system. This environment requires a compact (specific dimensions) and low power and low cost device. Thus, a general purpose device (e.g. a PC) is discarded and an embedded one with these features has been developed. However, in addition to these requirements it offers a flexibility similar to the PC. Thereby it is able to update and carry out tasks beyond synchronization platform easily.es
dc.description.sponsorshipMinisterio de Educación y Cultura TEC2007-61802/MICes
dc.description.sponsorshipMinisterio de Industria, Turismo y Comercio TSI-020100-2008-258es
dc.formatapplication/pdfes
dc.format.extent6es
dc.language.isoenges
dc.publisherIEEE Computer Societyes
dc.relation.ispartofSPL 2011: VII Southern Conference on Programmable Logic (2011), pp. 239-244.
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titleImplementation of a configuration server for a hardware SNTP synchronization platform based on FPGAes
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/submittedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Tecnología Electrónicaes
dc.relation.projectIDTEC2007-61802/MIC (HIPER)es
dc.relation.projectIDTSI-020100-2008-258es
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/5782655es
dc.identifier.doi10.1109/SPL.2011.5782655es
dc.contributor.groupUniversidad de Sevilla. TIC204: Investigación y Desarrollo Digitales
dc.publication.initialPage239es
dc.publication.endPage244es
dc.eventtitleSPL 2011: VII Southern Conference on Programmable Logices
dc.eventinstitutionCórdoba, Argentinaes
dc.relation.publicationplaceNew York, USAes
dc.contributor.funderMinisterio de Educación y Cultura (MEC). Españaes
dc.contributor.funderMinisterio de Industria, Turismo y Comercio. Españaes

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