dc.creator | Zamarreño Ramos, Carlos | es |
dc.creator | Serrano Gotarredona, Rafael | es |
dc.creator | Serrano Gotarredona, María Teresa | es |
dc.creator | Linares Barranco, Bernabé | es |
dc.date.accessioned | 2020-10-22T09:44:40Z | |
dc.date.available | 2020-10-22T09:44:40Z | |
dc.date.issued | 2008 | |
dc.identifier.citation | Zamarreño Ramos, C., Serrano Gotarredona, R., Serrano Gotarredona, M.T. y Linares Barranco, B. (2008). LVDS interface for AER links with burst mode operation capability. En ISCAS 2008: IEEE International Symposium on Circuits and Systems (644-647), Seattle, USA: IEEE Computer Society. | |
dc.identifier.isbn | 978-1-4244-1683-7 | es |
dc.identifier.issn | 0271-4302 | es |
dc.identifier.uri | https://hdl.handle.net/11441/102141 | |
dc.description.abstract | This paper presents the design and simulation of
a serial AER LVDS communication link. It converts data from
classical AER parallel bus with a 4-phase handshaking protocol
into a bit stream which is transmitted serially into a single
LVDS wire. At the receiver side data from the LVDS cable are
transformed back to a parallel AER bus and handshaking signals
are also properly managed. The link has been designed in a
90 nms technology. Extensive simulations have been performed
demonstrating that the link can operate at a speed of 1 Gbps
for all the technology corners, exhibiting a power consumption
of 27.8 mW for the transmitter and 12.3 mW for the receiver.
In the simulation the transmission channel was modelled as a 50
cm cat5E UTP cable, connected to the AER chip through 5 cm
PCB traces modelled as a coupled microstrip transmission line.
The design has been completed up to the layout level and has
been submitted for fabrication. The transmitter and the receiver
take up an area of 311x148 μm2 and 300x148 μm2 respectively. | es |
dc.description.sponsorship | European Union IST-2001-34124 (CAVIAR) | es |
dc.description.sponsorship | Ministerio de Educación y Ciencia TIC-2003-08164-C03- 01 | es |
dc.description.sponsorship | Ministerio de Educación y Ciencia TEC2006-11730-C03-01 | es |
dc.description.sponsorship | Junta de Andalucía P06-TIC-01417 | es |
dc.format | application/pdf | es |
dc.format.extent | 4 | es |
dc.language.iso | eng | es |
dc.publisher | IEEE Computer Society | es |
dc.relation.ispartof | ISCAS 2008: IEEE International Symposium on Circuits and Systems (2008), p 644-647 | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | LVDS interface for AER links with burst mode operation capability | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/submittedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores | es |
dc.relation.projectID | IST- 2001-34124 (CAVIAR) | es |
dc.relation.projectID | TIC-2003-08164-C03- 01 | es |
dc.relation.projectID | TEC2006-11730-C03-01 | es |
dc.relation.projectID | P06-TIC-01417 | es |
dc.relation.publisherversion | https://ieeexplore.ieee.org/document/4541500 | es |
dc.identifier.doi | 10.1109/ISCAS.2008.4541500 | es |
dc.publication.initialPage | 644 | es |
dc.publication.endPage | 647 | es |
dc.eventtitle | ISCAS 2008: IEEE International Symposium on Circuits and Systems | es |
dc.eventinstitution | Seattle, USA | es |
dc.relation.publicationplace | New York, USA | es |
dc.contributor.funder | European Union (UE) | es |
dc.contributor.funder | Ministerio de Educación y Ciencia (MEC). España | es |
dc.contributor.funder | Ministerio de Educación y Ciencia (MEC). España | es |
dc.contributor.funder | Junta de Andalucía | es |