Mostrar el registro sencillo del ítem

Ponencia

dc.creatorSerrano Gotarredona, María Teresaes
dc.creatorLinares Barranco, Bernabées
dc.date.accessioned2020-09-30T09:14:57Z
dc.date.available2020-09-30T09:14:57Z
dc.date.issued2000
dc.identifier.citationSerrano Gotarredona, M.T. y Linares Barranco, B. (2000). A Methodology for MOS Transistor Mismatch Parameter Extraction and Mismatch Simulation. En ISCAS 2000: IEEE International Symposium on Circuits and Systems (109-112), Geneva, Switzerland: IEEE Computer Society.
dc.identifier.isbn0-7803-5482-6es
dc.identifier.urihttps://hdl.handle.net/11441/101601
dc.description.abstractThis paper presents a methodology for mismatch parameter extraction and mismatch simulation using conventional electrical simulators, like HSpice. A measurement and extraction procedure has been carefully designed to be able to obtain reliable measurements of the mismatch parameters of a given technology. The correctness of this extraction procedure method has been checked through three different validation methods. We also present two methods for performing mismatch simulation with conventional circuit simulators (like HSpice) using the extracted parameters.es
dc.formatapplication/pdfes
dc.format.extent4es
dc.language.isoenges
dc.publisherIEEE Computer Societyes
dc.relation.ispartofISCAS 2000: IEEE International Symposium on Circuits and Systems (2000), p 109-112
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titleA Methodology for MOS Transistor Mismatch Parameter Extraction and Mismatch Simulationes
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/publishedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadoreses
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/858700es
dc.identifier.doi10.1109/ISCAS.2000.858700es
dc.publication.initialPage109es
dc.publication.endPage112es
dc.eventtitleISCAS 2000: IEEE International Symposium on Circuits and Systemses
dc.eventinstitutionGeneva, Switzerlandes
dc.relation.publicationplaceNew York, USAes

FicherosTamañoFormatoVerDescripción
A methodology for MOS transist ...436.4KbIcon   [PDF] Ver/Abrir  

Este registro aparece en las siguientes colecciones

Mostrar el registro sencillo del ítem

Attribution-NonCommercial-NoDerivatives 4.0 Internacional
Excepto si se señala otra cosa, la licencia del ítem se describe como: Attribution-NonCommercial-NoDerivatives 4.0 Internacional