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A Methodology for MOS Transistor Mismatch Parameter Extraction and Mismatch Simulation
dc.creator | Serrano Gotarredona, María Teresa | es |
dc.creator | Linares Barranco, Bernabé | es |
dc.date.accessioned | 2020-09-30T09:14:57Z | |
dc.date.available | 2020-09-30T09:14:57Z | |
dc.date.issued | 2000 | |
dc.identifier.citation | Serrano Gotarredona, M.T. y Linares Barranco, B. (2000). A Methodology for MOS Transistor Mismatch Parameter Extraction and Mismatch Simulation. En ISCAS 2000: IEEE International Symposium on Circuits and Systems (109-112), Geneva, Switzerland: IEEE Computer Society. | |
dc.identifier.isbn | 0-7803-5482-6 | es |
dc.identifier.uri | https://hdl.handle.net/11441/101601 | |
dc.description.abstract | This paper presents a methodology for mismatch parameter extraction and mismatch simulation using conventional electrical simulators, like HSpice. A measurement and extraction procedure has been carefully designed to be able to obtain reliable measurements of the mismatch parameters of a given technology. The correctness of this extraction procedure method has been checked through three different validation methods. We also present two methods for performing mismatch simulation with conventional circuit simulators (like HSpice) using the extracted parameters. | es |
dc.format | application/pdf | es |
dc.format.extent | 4 | es |
dc.language.iso | eng | es |
dc.publisher | IEEE Computer Society | es |
dc.relation.ispartof | ISCAS 2000: IEEE International Symposium on Circuits and Systems (2000), p 109-112 | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | A Methodology for MOS Transistor Mismatch Parameter Extraction and Mismatch Simulation | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/publishedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores | es |
dc.relation.publisherversion | https://ieeexplore.ieee.org/document/858700 | es |
dc.identifier.doi | 10.1109/ISCAS.2000.858700 | es |
dc.publication.initialPage | 109 | es |
dc.publication.endPage | 112 | es |
dc.eventtitle | ISCAS 2000: IEEE International Symposium on Circuits and Systems | es |
dc.eventinstitution | Geneva, Switzerland | es |
dc.relation.publicationplace | New York, USA | es |
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