dc.creator | Rosa Utrera, José Manuel de la | es |
dc.creator | Pérez Verdú, Belén | es |
dc.creator | Río Fernández, Rocío del | es |
dc.creator | Rodríguez Vázquez, Ángel Benito | es |
dc.date.accessioned | 2018-09-07T14:48:34Z | |
dc.date.available | 2018-09-07T14:48:34Z | |
dc.date.issued | 2000 | |
dc.identifier.citation | Rosa Utrera, J.M.d.l., Pérez Verdú, B., Río Fernández, R.d. y Rodríguez Vázquez, Á.B. (2000). A CMOS 0.8- µm transistor-only 1.63-MHz switched-current bandpass ΣΔ modulator for AM signal A/D conversion. IEEE Journal of Solid-State Circuits, 35 (8), 1220-1226. | |
dc.identifier.issn | 0018-9200 | es |
dc.identifier.uri | https://hdl.handle.net/11441/78382 | |
dc.description.abstract | This paper presents a CMOS 0.8-/spl mu/m switched-current (SI) fourth-order bandpass /spl Sigma//spl Delta/ modulator (BP-/spl Sigma//spl Delta/M) IC capable of handling signals up to 1.63 MHz with 105-bit resolution and 60-mW power consumption from a 5-V supply voltage. This modulator Is intended for direct A/D conversion of narrow-band signals within the commercial AM band, from 530 kHz to 1.6 MHz. Its architecture is obtained by applying a low-pass-to-bandpass transformation (z/sup -1//spl rarr/-z/sup -2/) to a 1-bit second-order low-pass /spl Sigma//spl Delta/ modulator (LP-/spl Sigma//spl Delta/M). The design of basic building blocks is based upon a detailed analysis of the influence of SI errors on the modulator performance, followed by design optimization. Memory-cell errors have been identified as the dominant ones. In order to attenuate these errors, fully differential regulated-folded cascode memory cells are employed. Measurements show a best SNR peak of 65 dB for signals of 10-kHz bandwidth and an intermediate frequency (IF) of 1.63 MHz. A correct noise-shaping filtering is achieved with a sampling frequency of up to 16 MHz. | es |
dc.description.sponsorship | Comisión Interministerial de Ciencia y Tecnología TIC 97-0580 | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | IEEE Journal of Solid-State Circuits, 35 (8), 1220-1226. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Analog-to-digital conversion | es |
dc.subject | ΣΔ modulation | es |
dc.subject | Switched-currentΔΣ | es |
dc.title | A CMOS 0.8- µm transistor-only 1.63-MHz switched-current bandpass ΣΔ modulator for AM signal A/D conversion | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.projectID | TIC 97-0580 | es |
dc.relation.publisherversion | http://dx.doi.org/10.1109/4.859514 | es |
dc.identifier.doi | 10.1109/4.859514 | es |
idus.format.extent | 7 p. | es |
dc.journaltitle | IEEE Journal of Solid-State Circuits | es |
dc.publication.volumen | 35 | es |
dc.publication.issue | 8 | es |
dc.publication.initialPage | 1220 | es |
dc.publication.endPage | 1226 | es |
dc.contributor.funder | Comisión Interministerial de Ciencia y Tecnología (CICYT). España | |