dc.creator | Serrano Gotarredona, Rafael | es |
dc.creator | Camuñas Mesa, Luis Alejandro | es |
dc.creator | Serrano Gotarredona, María Teresa | es |
dc.creator | Leñero Bardallo, Juan Antonio | es |
dc.creator | Linares Barranco, Bernabé | es |
dc.date.accessioned | 2018-07-23T08:40:45Z | |
dc.date.available | 2018-07-23T08:40:45Z | |
dc.date.issued | 2007 | |
dc.identifier.citation | Serrano Gotarredona, R., Camuñas Mesa, L.A., Serrano Gotarredona, M.T., Leñero Bardallo, J.A. y Linares Barranco, B. (2007). The stochastic I-Pot: A circuit block for programming bias currents. IEEE Transactions on Circuits and Systems II: Express Briefs, 54 (9), 760-764. | |
dc.identifier.issn | 1549-7747 | es |
dc.identifier.uri | https://hdl.handle.net/11441/77503 | |
dc.description.abstract | In this brief, we present the “Stochastic I-Pot.” It is a circuit element that allows for digitally programming a precise bias current ranging over many decades, from pico-amperes up to hundreds of micro-amperes. I-Pot blocks can be chained within a chip to allow for any arbitrary number of programmable bias currents. The approach only requires to provide the chip with three external pins, the use of an external current measuring instrument, and a computer. This way, once all internal I-Pots have been characterized, they can be programmed through a computer to provide any desired current bias value with very low error. The circuit block turns out to be very practical for experimenting with new circuits (specially when a large number of biases are required), testing wide ranges of biases, introducing means for current mismatch calibration, offsets compensations, etc. using a reduced number of chip pins. We show experimental results of generating bias currents with errors of 0.38% (8 bits) for currents varying from 176 A to 19.6 pA. Temperature effects are characterized. | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | IEEE Transactions on Circuits and Systems II: Express Briefs, 54 (9), 760-764. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Analog circuits | es |
dc.subject | Current-mode circuits | es |
dc.subject | Current biases | es |
dc.subject | Low-power circuits | es |
dc.title | The stochastic I-Pot: A circuit block for programming bias currents | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.publisherversion | http://dx.doi.org/10.1109/TCSII.2007.900881 | es |
dc.identifier.doi | 10.1109/TCSII.2007.900881 | es |
idus.format.extent | 5 p. | es |
dc.journaltitle | IEEE Transactions on Circuits and Systems II: Express Briefs | es |
dc.publication.volumen | 54 | es |
dc.publication.issue | 9 | es |
dc.publication.initialPage | 760 | es |
dc.publication.endPage | 764 | es |