dc.creator | Viejo Cortés, Julián | es |
dc.creator | Villar de Ossorno, José Ignacio | es |
dc.creator | Juan Chico, Jorge | es |
dc.creator | Millán Calderón, Alejandro | es |
dc.creator | Ostúa Arangüena, Enrique | es |
dc.creator | Quirós Carmona, Juan | es |
dc.date.accessioned | 2017-07-14T09:38:46Z | |
dc.date.available | 2017-07-14T09:38:46Z | |
dc.date.issued | 2012 | |
dc.identifier.citation | Viejo Cortés, J., Villar de Ossorno, J.I., Juan Chico, J., Millán Calderón, A., Ostúa Arangüena, E. y Quirós Carmona, J. (2012). Long-term on-chip verification of systems with logical events scattered in time. Microprocessors and Microsystems, 36 (5), 402-408. | |
dc.identifier.issn | 0141-9331 | es |
dc.identifier.uri | http://hdl.handle.net/11441/62510 | |
dc.description.abstract | Traditional on-chip and off-chip logic analyzers present important shortcomings when used for the longterm
verification of industrial embedded systems, forcing the designer to implement ad hoc verification
solutions. This paper introduces a suitable solution for long-term verification of FPGA-based designs consisting
of a verification core that uses the PicoBlaze microcontroller, dedicated logic and a serial port communication
in order to monitor the internal signals of the system in a continuous way. The core design
focuses on low resource requirements and has been successfully applied to the verification of a real
industrial synchronization platform showing remarkable advantages over commercial on-chip solutions
like Xilinx’s ChipScope Pro. Moreover, in order to improve the reusability of this core a software tool has
been developed to automatically include the verification core in any specific system. | es |
dc.description.sponsorship | Ministerio de Educación y Ciencia TEC2007-61802/MIC | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Elsevier | es |
dc.relation.ispartof | Microprocessors and Microsystems, 36 (5), 402-408. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | FPGA | es |
dc.subject | Long-term verification | es |
dc.subject | On-chip verification | es |
dc.subject | PicoBlaze | es |
dc.title | Long-term on-chip verification of systems with logical events scattered in time | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/submittedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Tecnología Electrónica | es |
dc.relation.projectID | TEC2007-61802/MIC | es |
dc.relation.publisherversion | http://www.sciencedirect.com/science/article/pii/S0141933112000221 | es |
dc.identifier.doi | 10.1016/j.micpro.2012.02.005 | es |
idus.format.extent | 6 | es |
dc.journaltitle | Microprocessors and Microsystems | es |
dc.publication.volumen | 36 | es |
dc.publication.issue | 5 | es |
dc.publication.initialPage | 402 | es |
dc.publication.endPage | 408 | es |
dc.identifier.sisius | 20300258 | es |
dc.contributor.funder | Ministerio de Educación y Ciencia (MEC). España | |