Repositorio de producción científica de la Universidad de Sevilla

ASIC implementation of an ARM - based system on chip


Advanced Search
Opened Access ASIC implementation of an ARM - based system on chip
Show item statistics
Export to
Author: Granado Romero, Joaquín
Chávez Orzaez, Jorge Jesús
Colodro Ruiz, Francisco
Torralba Silgado, Antonio Jesús
García Franquelo, Leopoldo
Ramos, E.
Hidalgo, A.
Tortolero, A.
Ruiz, F.
Department: Universidad de Sevilla. Departamento de Ingeniería Electrónica
Date: 2000
Published in: Design of Circuits and Integrated Systems, 567-570. Montpellier, Francia : DCIS
Document type: Presentation
Abstract: This paper presents the hardware architecture of a System on Chip (SoC) implemented in an ASIC. It has been designed for a wide range of applications and will be used in a power line modem. A set of reusable cells based on AMBA standard has been also designed, included memory, interrupt controller and peripherals. Presented architecture implements an ARM© processor, a 32-bit RISC processor which is becoming a RISC standard.
Size: 200.3Kb
Format: PDF


This work is under a Creative Commons License: 
Attribution-NonCommercial-NoDerivatives 4.0 Internacional

This item appears in the following Collection(s)