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Mostrando ítems 1-9 de 9
Artículo
Efficient Memory Organization for DNN Hardware Accelerator Implementation on PSoC
(MDPI, 2021-01)
The use of deep learning solutions in different disciplines is increasing and their algorithms are computationally expensive in most cases. For this reason, numerous hardware accelerators have appeared to compute their ...
Artículo
A Binaural Neuromorphic Auditory Sensor for FPGA: A Spike Signal Processing Approach
(IEEE Computer Society, 2017)
This paper presents a new architecture, design flow, and field-programmable gate array (FPGA) implementation analysis of a neuromorphic binaural auditory sensor, designed completely in the spike domain. Unlike digital ...
Ponencia
Event-based Row-by-Row Multi-convolution engine for Dynamic-Vision Feature Extraction on FPGA
(IEEE Computer Society, 2018)
Neural networks algorithms are commonly used to recognize patterns from different data sources such as audio or vision. In image recognition, Convolutional Neural Networks are one of the most effective techniques due ...
Ponencia
Estimación de distancias mediante un sistema de estéreo-visión basado en retinas DVS
(3ciencias. Editorial Área de Innovación y Desarrollo,S.L., 2018)
La estimación de distancias es uno de los objetivos más importantes en todo sistema de visión artificial. Para poder llevarse a cabo, es necesaria la presencia de más de un sensor de visión para poder enfocar los objetos ...
Artículo
A PCI AER Co-Processor Evaluation Based on CPUs Performance Counters
(JIT Editorial Office, Library and Information Center, National Dong Hwa University, 2012)
Image processing in digital computer systems usually considers the visual information as a sequence of frames. These frames are from cameras that capture reality for a short period of time. They are renewed and transmitted ...
Ponencia
An AER to CAN Bridge for Spike-Based Robot Control
(Springer, 2011)
Address-Event-Representation (AER) is a bio-inspired communication protocol between chips. A set of AER sensors (retina and cochleas), processors (convolvers, WTA, mappers, …) and actuators can be found in the literature ...
Ponencia
An Approach to Distance Estimation with Stereo Vision Using Address-Event-Representation
(Springer, 2011)
Image processing in digital computer systems usually considers the visual information as a sequence of frames. These frames are from cameras that capture reality for a short period of time. They are renewed and transmitted ...
Ponencia
A perfomance comparison study between synchronous and asynchronous FPGA for spike based systems. Under the AER synthetic generation
(IEEE Computer Society, 2011)
Neuromorphic engineering tries to mimic biology in information processing. Address-Event Representation (AER) is a neuromorphic communication protocol for spiking neurons between different layers. AER bio-inspired ...
Artículo
Stereo Matching in Address-Event-Representation (AER) Bio-Inspired Binocular Systems in a Field-Programmable Gate Array (FPGA)
(MDPI, 2019)
In stereo-vision processing, the image-matching step is essential for results, although it involves a very high computational cost. Moreover, the more information is processed, the more time is spent by the matching ...