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Mostrando ítems 1-10 de 29
Ponencia
Real-time remote reporting of motion analysis with Wi-Flip
(Institute of Electrical and Electronics Engineers, 2012)
This paper describes a real-time application programmed into Wi-FLIP, a wireless smart camera resulting from the integration of FLIP-Q, a prototype mixed-signal focal-plane array processor, and Imote2, a commercial WSN ...
Ponencia
Hardware-Aware Performance Evaluation for the Co-Design of Image Sensors and Vision Algorithms
(Institute of Electrical and Electronics Engineers, 2016)
The top-down approach to system design allows obtaining separate specifications for each subsystem. In the case of vision systems, this means propagating system-level specifications down to particular specifications for ...
Ponencia
A 26.5 nJ/px 2.64 Mpx/s CMOS Vision Sensor for Gaussian Pyramid Extraction
(Institute of Electrical and Electronics Engineers, 2014)
This paper introduces a CMOS vision sensor to extract the Gaussian pyramid with an energy cost of 26.5 nJ/px at 2.64 Mpx/s, thus outperforming conventional solutions employing an imager and a separate digital processor. ...
Ponencia
An ultra-low-power voltage-mode asynchronous WTA-LTA circuit
(Institute of Electrical and Electronics Engineers, 2013)
This paper presents an asynchronous mixed-signal WTA-LTA circuit conceived to carry out local minimummaximum indexing in massively parallel image processing arrays. The hardware is focused on energy-efficient operation. ...
Ponencia
On the design of a sparsifying dictionary for compressive image feature extraction
(Institute of Electrical and Electronics Engineers, 2015)
Compressive sensing is an alternative to Nyquist-rate sampling when the signal to be acquired is known to be sparse or compressible. A sparse signal has a small number of nonzero components compared to its total length. ...
Ponencia
Real-time single-exposure ROI-driven HDR adaptation based on focal-plane reconfiguration
(Society of Photo-Optical Instrumentation Engineers, 2015)
This paper describes a prototype smart imager capable of adjusting the photo-integration time of multiple regions of interest concurrently, automatically and asynchronously with a single exposure period. The operation is ...
Ponencia
On-The-Fly Deployment of Deep Neural Networks on Heterogeneous Hardware in a Low-Cost Smart Camera
(Association for Computing Machinery, 2018)
This demo showcases a low-cost smart camera where different hardware configurations can be selected to perform image recognition on deep neural networks. Both the hardware configuration and the network model can be changed ...
Ponencia
Wi-FLIP: A wireless smart camera based on a focal-plane low-power image processor
(Institute of Electrical and Electronics Engineers, 2011)
This paper presents Wi-FLIP, a vision-enabled WSN node resulting from the integration of FLIP-Q, a prototype vision chip, and Imotel, a commercial WSN platform. In Wi-FLIP, image processing is not only constrained to the ...
Ponencia
Power-efficient focal-plane image representation for extraction of enriched Viola-Jones features
(Institute of Electrical and Electronics Engineers, 2012)
This paper describes the use of a reconfigurable focal-plane processing array in order to achieve an image representation which dramatically reduces the computational load of the Viola-Jones object detection framework. ...
Ponencia
Form Factor Improvement of Smart-Pixels for Vision Sensors through 3-D Vertically- Integrated Technologies
(Institute of Electrical and Electronics Engineers, 2014)
While conventional CMOS active pixel sensors embed only the circuitry required for photo-detection, pixel addressing and voltage buffering, smart pixels incorporate also circuitry for data processing, data storage and ...