Listar Ponencias (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por autor "Espejo Meana, Servando Carlos"
Mostrando ítems 21-39 de 39
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Ponencia
Design of an analog/digital truly random number generator
(Institute of Electrical and Electronics Engineers, 1990)An analog-digital system is presented for the generation of truly random (aperiodic) digital sequences. This model is based ...
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Ponencia
Experimental demonstration of real-time image-processing using a VLSI analog programmable array processor
(SPIE- The International Society for Optical Engineering, 2000)This paper describes a full-custom mixed-signal chip which embeds distributed optical signal acquisition, digitallyprogrammable analog ...
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Ponencia
Four-quadrant one-transistor-synapse for high-density CNN implementations
(Institute of Electrical and Electronics Engineers, 1998)Presents a linear four-quadrants, electrically-programmable, one-transistor synapse strategy applicable to the implementation ...
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Ponencia
Hybrid-control of synapse circuits for programmable cellular neural networks
(Institute of Electrical and Electronics Engineers, 1996)This paper describes a hybrid weight-control strategy for VLSI realizations of programmable Cellular Neural Networks (CNNs), ...
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Ponencia
Implementation of non-linear templates using a decomposition technique by a 0.5 /spl mu/m CMOS CNN universal chip
(Institute of Electrical and Electronics Engineers, 2000)This paper demonstrates the processing capabilities of a recently designed analog programmable array processor. This new ...
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Ponencia
Mismatch-induced tradeoffs and scalability of mixed-signal vision chips
(Institute of Electrical and Electronics Engineers, 2002)This paper explores different trade-offs associated with the design of analog VLSI chips. These trade-offs are related to ...
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Ponencia
Mixed-signal CNN array chips for image processing
(The International Society for Optical Engineering, 1996)Due to their local connectivity and wide functional capabilities, cellular nonlinear networks (CNN) are excellent candidates ...
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Ponencia
Object oriented image segmentation on the CNNUC3 chip
(Institute of Electrical and Electronics Engineers, 2000)We show how a complex object oriented image analysis algorithm can be implemented on a CNNUM chip for video-coding. Besides ...
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Ponencia
OWLs: A mixed-signal ASIC for optical wire-less links in space instruments
(European Space Agency. Publications Division, 2012)This paper describes the design of a mixed-signal ASIC for space application and the techniques employed for radiation ...
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Ponencia
Programmable resolution imager for imaging applications
(SPIE- The International Society for Optical Engineering, 2000)In this paper a programmable imager with averaging capabilities will be described which is intended for averaging of ...
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Ponencia
Programmable retinal dynamics in a CMOS mixed-signal array processor chip
(The International Society for Optical Engineering - SPIE, 2003)The low-level image processing that takes place in the retina is intended to compress the relevant visual information to ...
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Ponencia
Realization of a CNN universal chip in CMOS technology
(Institute of Electrical and Electronics Engineers, 1995)This paper describes the design of a programmable Cellular Neural Network (CNN) chip, with additional functionalities ...
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Ponencia
Realization of non-linear templates using the CNNUC3 prototype
(Institute of Electrical and Electronics Engineers, 2000)Demonstrates the processing capabilities of an analog programmable array processor chipMINUS/CNNUC3-which follows the ...
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Ponencia
SIRENA: A simulation environment for CNNs
(Institute of Electrical and Electronics Engineers, 1994)SIRENA is a general simulation environment for artificial neural networks, with emphasis towards CNNs. A special interest ...
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Ponencia
Some design trade-offs for large CNN chips using small-size transistors
(Institute of Electrical and Electronics Engineers, 1997)Small-size MOS transistors (MOST) exhibit a bunch of second-order effects which limit their application to design Cellular ...
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Ponencia
Structure reconfigurability of the CNNUC3 for robust template operation
(Institute of Electrical and Electronics Engineers, 2000)We demonstrate the importance of the reconfigurability of a 64/spl times/64 cells size CNN-UM chip. As we show, in such a ...
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Ponencia
Switched-current techniques for image processing Cellular Neural Networks in MOS VLSI
(Institute of Electrical and Electronics Engineers, 1992)An architecture and related building blocks are presented for the realization of image processing tasks using current-mode ...
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Ponencia
The CNNUC3: an analog I/O 64x64 CNN universal machine chip prototype with 7-bit analog accuracy
(Institute of Electrical and Electronics Engineers, 2000)This paper describes a full-custom mixed-signal chip which embeds distributed optical signal acquisition, digitally-programmable ...
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Ponencia
Weight-control strategy for programmable CNN chips
(Institute of Electrical and Electronics Engineers, 1994)This paper describes a hybrid weight-control strategy for the VLSI realization of programmable CNNs, based on automatic ...