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Mostrando ítems 1-10 de 41
Artículo
A Configurable Event-Driven Convolutional Node with Rate Saturation Mechanism for Modular ConvNet Systems Implementation
(Frontiers Media, 2018)
Convolutional Neural Networks (ConvNets) are a particular type of neural network often used for many applications like image recognition, video analysis or natural language processing. They are inspired by the human brain, ...
Artículo
Plasticity in memristive devices for spiking neural networks
(Frontiers Media, 2015)
Memristive devices present a new device technology allowing for the realization of compact non-volatile memories. Some of them are already in the process of industrialization. Additionally, they exhibit complex multilevel ...
Artículo
Current-mode fully-programmable piece-wise-linear block for neuro-fuzzy applications
(Institute of Electrical and Electronics Engineers, 2002)
A new method to implement an arbitrary piece-wise-linear characteristic in current mode is presented. Each of the breaking points and each slope is separately controllable. As an example a block that implements an N-shaped ...
Artículo
Compact low-power calibration mini-DACs for neural arrays with programmable weights
(Institute of Electrical and Electronics Engineers, 2003)
This paper considers the viability of compact low-resolution low-power mini digital-to-analog converters (mini-DACs) for use in large arrays of neural type cells, where programmable weights are required. Transistors are ...
Artículo
Benchmarking Spike-Based Visual Recognition: A Dataset and Evaluation
(Frontiers Media, 2016)
Today, increasing attention is being paid to research into spike-based neural computation both to gain a better understanding of the brain and to explore biologically-inspired computation. Within this field, the primate ...
Artículo
A spatial contrast retina with on-chip calibration for neuromorphic spike-based AER vision systems
(Institute of Electrical and Electronics Engineers, 2007)
We present a 32 32 pixels contrast retina microchip that provides its output as an address event representation (AER) stream. Spatial contrast is computed as the ratio between pixel photocurrent and a local average between ...
Artículo
Fast Predictive Handshaking in Synchronous FPGAs for Fully Asynchronous Multisymbol Chip Links: Application to SpiNNaker 2-of-7 Links
(Institute of Electrical and Electronics Engineers, 2016)
Asynchronous handshaken interchip links are very popular among neuromorphic full-custom chips due to their delay-insensitive and high-speed properties. Of special interest are those links that minimize bit-line transitions ...
Artículo
A neuromorphic cortical-layer microchip for spike-based event processing vision systems
(Institute of Electrical and Electronics Engineers, 2006)
We present a neuromorphic cortical-layer processing microchip for address event representation (AER) spike-based processing systems. The microchip computes 2-D convolutions of video information represented in AER format ...
Artículo
On Real-Time AER 2-D Convolutions Hardware for Neuromorphic Spike-Based Cortical Processing
(IEEE Computer Society, 2008)
In this paper, a chip that performs real-time image convolutions with programmable kernels of arbitrary shape is presented. The chip is a first experimental prototype of reduced size to validate the implemented circuits ...
Artículo
CAVIAR: A 45k neuron, 5M synapse, 12G connects/s AER hardware sensory-processing-learning-actuating system for high-speed visual object recognition and tracking
(Institute of Electrical and Electronics Engineers, 2009)
This paper describes CAVIAR, a massively parallel hardware implementation of a spike-based sensing-processing-learning-actuating system inspired by the physiology of the nervous system. CAVIAR uses the asychronous address-event ...