Listar Artículos (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por fecha de publicación
Mostrando ítems 21-40 de 285
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A modular T-mode design approach for analog neural network hardware implementations
(Institute of Electrical and Electronics Engineers, 1992)A modular transconductance-mode (T-mode) design approach is presented for analog hardware implementations of neural networks. ...
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Nonlinear switched-current CMOS IC for random signal generation
(Institution of Engineering and Technology, 1993)A nonlinear switched-current circuit is presented that implements a chaotic algorithm for the generation of broadband, ...
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Current-Mode Techniques for the Implementation of Continuous- and Discrete-Time Cellular Neural Networks
(Institute of Electrical and Electronics Engineers, 1993)This paper presents a unified, comprehensive approach to the design of continuous-time (CT) and discrete-time (DT) ...
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A CMOS analog adaptive BAM with on-chip learning and weight refreshing
(Institute of Electrical and Electronics Engineers, 1993)In this paper we will extend the transconductance-mode (T-mode) approach [1] to implement analog continuous-time neural ...
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Switched-Current Chaotic Neurons
(Institution of Engineering and Technology, 1994)The Letter presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural ...
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State merging and state splitting via state assignment: a new FSM synthesis algorithm
(Institute of Electrical and Electronics Engineers, 1994)The authors describe a state assignment algorithm for FSMs which produces an assignment of non-necessarily distinct, and ...
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CMOS optical-sensor array with high output current levels and automatic signal-range centring
(Institution of Engineering and Technology, 1994)A CMOS compatible photosensor with high output current levels, and an area-efficient scheme for automatic signal-range ...
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The active-input regulated-cascode current mirror
(Institute of Electrical and Electronics Engineers, 1994)A continuous-time current mirror circuit is presented that combines an active input and a regulated cascode output. The ...
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Global design of analog cells using statistical optimization techniques
(Springer, 1994)We present a methodology for automated sizing of analog cells using statistical optimization in a simulation based approach. ...
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Smart-Pixel Cellular Neural Networks in Analog Current-Mode CMOS Technology
(Institute of Electrical and Electronics Engineers, 1994)This paper presents a systematic approach to design CMOS chips with concurrent picture acquisition and processing capabilities. ...
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Algorithm for efficient symbolic analysis of large analogue circuits
(Institution of Engineering and Technology, 1994)An algorithm is presented that generates simplified symbolic expressions for the small-signal characteristics of large ...
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Using Building Blocks to Design Analog Neuro-Fuzzy Controllers
(Institute of Electrical and Electronics Engineers, 1995)We present a parallel architecture for fuzzy controllers and a methodology for their realization as analog CMOS chips for ...
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Efficient symbolic computation of approximated small-signal characteristics of analog integrated circuits
(Institute of Electrical and Electronics Engineers, 1995)A symbolic analysis tool is presented that generates simplified symbolic expressions for the small-signal characteristics ...
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A real-time clustering microchip neural engine
(Institute of Electrical and Electronics Engineers, 1996)This paper presents an analog current-mode VLSI implementation of an unsupervised clustering algorithm. The clustering ...
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A modified ART 1 algorithm more suitable for VLSI implementations
(Elsevier, 1996)This paper presents a modification to the original ART 1 algorithm (Carpenter and Grossberg, 1987a, A massively parallel ...
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CMOS 2.4μm chaotic oscillator: Experimental verification of chaotic encryption of audio
(Institution of Engineering and Technology, 1996)The Letter reports the first experimental verification of chaotic encryption of audio using custom monolithic chaotic ...
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A 0.8-μm CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage
(Institute of Electrical and Electronics Engineers, 1997)This paper presents a CMOS chip for the parallel acquisition and concurrent analog processing of two-dimensional (2-D) ...
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Using CAD tools for shortening the design cycle of high-performance sigma–delta modulators: A 16·4 bit, 9·6 kHz, 1·71 mW ΣΔM in CMOS 0·7 μm technology
(Wiley-Blackwell, 1997)This paper uses a CAD methodology proposed by the authors to design a low-power 2nd-order Sigma-Delta Modulator (ΣΔM). ...
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Robust high-accuracy high-speed continuous-time CMOS current comparator
(Institution of Engineering and Technology, 1997)The authors present a CMOS current comparator which employs nonlinear negative feedback to obtain high-accuracy (down to ...
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An ART1 microchip and its use in multi-ART1 systems
(Institute of Electrical and Electronics Engineers, 1997)Recently, a real-time clustering microchip neural engine based on the ART1 architecture has been reported. Such chip is ...