Listar Instituto de Microelectrónica de Sevilla (IMSE-CNM) por título
Mostrando ítems 587-599 de 599
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Artículo
Ultralow-power processing array for image enhancement and edge detection
(Institute of Electrical and Electronics Engineers, 2012)This paper presents a massively parallel processing array designed for the 0.13-μm 1.5-V standard CMOS base process of a ...
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Artículo
Unified RTN and BTI statistical compact modeling from a defect-centric perspective
(Elsevier, 2021-11)In nowadays deeply scaled CMOS technologies, time-dependent variability effects have become important concerns for analog ...
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Using Building Blocks to Design Analog Neuro-Fuzzy Controllers
(Institute of Electrical and Electronics Engineers, 1995)We present a parallel architecture for fuzzy controllers and a methodology for their realization as analog CMOS chips for ...
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Artículo
Using CAD tools for shortening the design cycle of high-performance sigma–delta modulators: A 16·4 bit, 9·6 kHz, 1·71 mW ΣΔM in CMOS 0·7 μm technology
(Wiley-Blackwell, 1997)This paper uses a CAD methodology proposed by the authors to design a low-power 2nd-order Sigma-Delta Modulator (ΣΔM). ...
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Ponencia
Using CAD Tools for the Automatic Design of Low-Power ΣΔ Modulators
(1997)This paper illustrates the use of a CAD methodology to design a high-resolution 2nd-order ZA modulator with optimized power ...
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Ponencia
Using multi-threshold threshold gates in rtd-based logic design. A case study
(Laboratoire TIMA, 2007)The basic building blocks for Resonant Tunnelling Diode (RTD) logic circuits are Threshold Gates (TGs) instead of the ...
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Ponencia
Very high frequency CMOS OTA-C quadrature oscillators
(Institute of Electrical and Electronics Engineers, 1990)An approach to the design of high-frequency monolithic voltage-controlled oscillators using operational transconductance ...
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Artículo
Very wide range tunable CMOS/bipolar current mirrors with voltage clamped input
(Institute of Electrical and Electronics Engineers, 1999)In low power current mode signal processing circuits it is often necessary to use current mirrors to replicate and ...
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Artículo
VLSI Design of Trusted Virtual Sensors
(Multidisciplinary Digital Publishing Institute, 2018)This work presents a Very Large Scale Integration (VLSI) design of trusted virtual sensors providing a minimum unitary ...
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Ponencia
VLSI implementation of a transconductance mode continuous BAM with on chip learning and dynamic analog memory
(Institute of Electrical and Electronics Engineers, 1991)In this paper we present a complete VLSI Continuous-Time Bidirectional Associative Memory (BAM). The short term memory ...
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Ponencia
Weight-control strategy for programmable CNN chips
(Institute of Electrical and Electronics Engineers, 1994)This paper describes a hybrid weight-control strategy for the VLSI realization of programmable CNNs, based on automatic ...
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Ponencia
Wi-FLIP: A wireless smart camera based on a focal-plane low-power image processor
(Institute of Electrical and Electronics Engineers, 2011)This paper presents Wi-FLIP, a vision-enabled WSN node resulting from the integration of FLIP-Q, a prototype vision chip, ...
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Ponencia
Wide range 8ps incremental resolution time interval generator based on FPGA technology
(Institute of Electrical and Electronics Engineers, 2014)Accurate generation of picosecond-resolution wide-range time intervals has become a necessity for the characterization of ...