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Mostrando ítems 1-10 de 20
Ponencia
Circuit implementation of piecewise-affine functions based on lattice representation
(Institute of Electrical and Electronics Engineers, 2011)
This paper introduces a digital architecture to implement piecewise-affine (PWA) functions based on representation methods from the lattice theory. Given an explicit and continuous PWA function, the parameters required to ...
Ponencia
Design Flow to Evaluate the Performance of Ring Oscillator PUFs on FPGAs
(Institute of Electrical and Electronics Engineers. IEEE, 2021)
This work presents a unified framework to design, implement and evaluate the performance of Ring Oscillator Physical Unclonable Functions (RO PUFs) on FPGAs. The design flow uses a Digital Signal Processing (DSP) tool ...
Ponencia
Reducing bit flipping problems in SRAM physical unclonable functions for chip identification
(Institute of Electrical and Electronics Engineers, 2012)
Physical Unclonable functions (PUFs) have appeared as a promising solution to provide security in hardware. SRAM PUFs offer the advantage, over other PUF constructions, of reusing resources (memories) that already exist ...
Ponencia
ASIC-in-the-loop methodology for verification of piecewise affine controllers
(Institute of Electrical and Electronics Engineers, 2012)
This paper exposes a hardware-in-the-loop metho- dology to verify the performance of a programmable and confi- gurable application specific integrated circuit (ASIC) that imple- ments piecewise affine (PWA) controllers. ...
Ponencia
Diseño de sistemas difusos para procesado de imágenes con XFuzzy 3
(2010)
La presente comunicación describe la utilización de un software de libre distribución, Xfuzzy 3, para ilustrar la aplicación de sistemas difusos al procesamiento de imágenes, en concreto, al problema del aumento de resolución. ...
Ponencia
Digital implementation of hierarchical piecewise-affine controllers
(Institute of Electrical and Electronics Engineers, 2011)
This paper proposes the design of hierarchical piecewise-affine (PWA) controllers to alleviate the processing time or prohibitive memory requirements of large controller structures. The constituent PWA modules of the ...
Ponencia
Un algoritmo en tiempo real para etiquetado de componentes conectados en imágenes
(Instituto Nacional de Astrofísica, Óptica y Electrónica; Universidad de Sevilla, 2012-03)
Esta comunicación presenta un algoritmo de dos pasadas para el etiquetado en tiempo real de los componentes conexos en una imagen. El algoritmo propuesto es una buena opción frente a otras alternativas de dos y múltiples ...
Ponencia
FPGA-based implementation of a fuzzy motion adaptive de-interlacing algorithm
(2007)
This paper surveys the hardware implementation of a de-interlacing algorithm on Field-Programmable Technology for real-time processing. The algorithm presented evaluates the level of motion at each pixel, and determines ...
Ponencia
A fuzzy motion adaptive de-interlacing algorithm capable of detecting field repetition patterns
(2007)
A new motion adaptive algorithm for de-interlacing video is proposed in this paper. It employs two fuzzy systems to interpolate the missing lines of the transmission. One fuzzy system is used to evaluate the motion level ...
Ponencia
Using Xfuzzy environment for the whole design of fuzzy systems
(Institute of Electrical and Electronics Engineers, 2007)
Since 1992, Xfuzzy environment has been improving to ease the design of fuzzy systems. The current version, Xfuzzy 3, which is entirely programmed in Java, includes a wide set of new featured tools that allow automating ...