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Artículo
Analog Neural Programmable Optimizers in CMOS VLSI Technologies
dc.creator | Domínguez Castro, Rafael | es |
dc.creator | Rodríguez Vázquez, Ángel Benito | es |
dc.creator | Huertas Díaz, José Luis | es |
dc.creator | Sánchez Sinencio, Edgar | es |
dc.date.accessioned | 2020-03-20T15:04:56Z | |
dc.date.available | 2020-03-20T15:04:56Z | |
dc.date.issued | 1992 | |
dc.identifier.citation | Domínguez Castro, R., Rodríguez Vázquez, Á.B., Huertas Díaz, J.L. y Sánchez Sinencio, E. (1992). Analog Neural Programmable Optimizers in CMOS VLSI Technologies. IEEE Journal of Solid-State Circuits, 27 (7), 1110-1115. | |
dc.identifier.issn | 0018-9200 | es |
dc.identifier.issn | 1558-173X | es |
dc.identifier.uri | https://hdl.handle.net/11441/94394 | |
dc.description.abstract | A 3-μm CMOS IC is presented demonstrating the concept of an analog neural system for constrained optimization. A serial time-multiplexed general-purpose architecture is introduced for the real-time solution of this kind of problem in MOS VLSI. This architecture is a fully programmable and reconfigurable one exploiting SC techniques for the analog part and making extensive use of digital techniques for programmability. | es |
dc.format | application/pdf | es |
dc.format.extent | 6 p. | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | IEEE Journal of Solid-State Circuits, 27 (7), 1110-1115. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | Analog Neural Programmable Optimizers in CMOS VLSI Technologies | es |
dc.type | info:eu-repo/semantics/article | es |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.publisherversion | https://doi.org/10.1109/4.142611 | es |
dc.identifier.doi | 10.1109/4.142611 | es |
dc.journaltitle | IEEE Journal of Solid-State Circuits | es |
dc.publication.volumen | 27 | es |
dc.publication.issue | 7 | es |
dc.publication.initialPage | 1110 | es |
dc.publication.endPage | 1115 | es |
dc.identifier.sisius | 20366528 | es |
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