dc.creator | Pérez Verdú, Belén | es |
dc.creator | Huertas Díaz, José Luis | es |
dc.creator | Rodríguez Vázquez, Ángel Benito | es |
dc.date.accessioned | 2020-03-19T15:48:08Z | |
dc.date.available | 2020-03-19T15:48:08Z | |
dc.date.issued | 1988 | |
dc.identifier.citation | Pérez Verdú, B., Huertas Díaz, J.L. y Rodríguez Vázquez, Á.B. (1988). A new nonlinear time-domain op-amp macromodel using threshold functions and digitally controlled network elements. IEEE Journal of Solid-State Circuits, 23 (4), 959-971. | |
dc.identifier.issn | 0018-9200 | es |
dc.identifier.issn | 1558-173X | es |
dc.identifier.uri | https://hdl.handle.net/11441/94335 | |
dc.description.abstract | A general-purpose nonlinear macromodel for the time-domain simulation of integrated circuit operational amplifiers (op amps), either bipolar or MOS, is presented. Three main differences exist between the macromodel and those previously reported in the literature for the time domain. First, all the op-amp nonlinearities are simulated using threshold elements and digital components, thus making them well suited for a mixed electrical/logical simulator. Secondly, the macromodel exhibits a superior performance in those cases where the op amp is driven by a large signal. Finally, the macromodel is advantageous in terms of CPU time. Several examples are included illustrating all of these advantages. The main application of this macromodel is for the accurate simulation of the analog part of a combined analog/digital integrated circuit | es |
dc.format | application/pdf | es |
dc.format.extent | 13 p. | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | IEEE Journal of Solid-State Circuits, 23 (4), 959-971. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | A new nonlinear time-domain op-amp macromodel using threshold functions and digitally controlled network elements | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.publisherversion | https://doi.org/10.1109/4.347 | es |
dc.identifier.doi | 10.1109/4.347 | es |
dc.journaltitle | IEEE Journal of Solid-State Circuits | es |
dc.publication.volumen | 23 | es |
dc.publication.issue | 4 | es |
dc.publication.initialPage | 959 | es |
dc.publication.endPage | 971 | es |
dc.identifier.sisius | 20366505 | es |