dc.creator | Tapiador Morales, Ricardo | es |
dc.creator | Linares Barranco, Alejandro | es |
dc.creator | Jiménez Fernández, Ángel Francisco | es |
dc.creator | Jiménez Moreno, Gabriel | es |
dc.date.accessioned | 2020-01-13T08:47:10Z | |
dc.date.available | 2020-01-13T08:47:10Z | |
dc.date.issued | 2018 | |
dc.identifier.citation | Tapiador Morales, R., Linares Barranco, A., Jiménez Fernández, Á.F. y Jiménez Moreno, G. (2018). Neuromorphic LIF Row-by-Row Multiconvolution Processor for FPGA. IEEE Transactions on Biomedical Circuits and Systems, 13 (1), 159-169. | |
dc.identifier.issn | 1932-4545 | es |
dc.identifier.uri | https://hdl.handle.net/11441/91456 | |
dc.description.abstract | Deep Learning algorithms have become state-of-theart
methods for multiple fields, including computer vision, speech
recognition, natural language processing, and audio recognition,
among others. In image vision, convolutional neural networks
(CNN) stand out. This kind of network is expensive in terms of
computational resources due to the large number of operations required
to process a frame. In recent years, several frame-based chip
solutions to deploy CNN for real time have been developed. Despite
the good results in power and accuracy given by these solutions, the
number of operations is still high, due the complexity of the current
network models. However, it is possible to reduce the number of
operations using different computer vision techniques other than
frame-based, e.g., neuromorphic event-based techniques. There exist
several neuromorphic vision sensors whose pixels detect changes
in luminosity. Inspired in the leaky integrate-and-fire (LIF) neuron,
we propose in this manuscript an event-based field-programmable
gate array (FPGA) multiconvolution system. Its main novelty is the
combination of a memory arbiter for efficient memory access to
allowrow-by-rowkernel processing. This system is able to convolve
64 filters across multiple kernel sizes, from 1 × 1 to 7 × 7, with
latencies of 1.3 μs and 9.01 μs, respectively, generating a continuous
flow of output events. The proposed architecture will easily fit
spike-based CNNs. | es |
dc.description.sponsorship | Ministerio de Economía y Competitividad TEC2016-77785-P | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | IEEE Computer Society | es |
dc.relation.ispartof | IEEE Transactions on Biomedical Circuits and Systems, 13 (1), 159-169. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Address-event-representation | es |
dc.subject | Artificial intelligence | es |
dc.subject | Computer vision | es |
dc.subject | Convolutional Neural Networks (CNN) | es |
dc.subject | Deep learning | es |
dc.title | Neuromorphic LIF Row-by-Row Multiconvolution Processor for FPGA | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/submittedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores | es |
dc.relation.projectID | TEC2016-77785-P | es |
dc.relation.publisherversion | https://ieeexplore.ieee.org/document/8526309 | es |
dc.identifier.doi | 10.1109/TBCAS.2018.2880012 | es |
dc.contributor.group | Universidad de Sevilla. TEP-108: Robótica y Tecnología de Computadores Aplicada a la Rehabilitación | es |
idus.format.extent | 11 | es |
dc.journaltitle | IEEE Transactions on Biomedical Circuits and Systems | es |
dc.publication.volumen | 13 | es |
dc.publication.issue | 1 | es |
dc.publication.initialPage | 159 | es |
dc.publication.endPage | 169 | es |