dc.creator | Fernández Berni, Jorge | es |
dc.creator | Carmona Galán, Ricardo | es |
dc.creator | Río Fernández, Rocío del | es |
dc.creator | Rodríguez Vázquez, Ángel Benito | es |
dc.date.accessioned | 2019-09-26T17:29:37Z | |
dc.date.available | 2019-09-26T17:29:37Z | |
dc.date.issued | 2015 | |
dc.identifier.citation | Fernández Berni, J., Carmona Galán, R., Río Fernández, R.d. y Rodríguez Vázquez, Á.B. (2015). Bottom-up performance analysis of focal-plane mixed-signal hardware for Viola–Jones early vision tasks. International Journal of Circuit Theory and Applications, 43 (8), 1063-1079. | |
dc.identifier.issn | 0098-9886 | es |
dc.identifier.issn | 1097-007X | es |
dc.identifier.uri | https://hdl.handle.net/11441/89338 | |
dc.description.abstract | Focal-plane mixed-signal arrays have traditionally been designed according to the general claim that moderate accuracy in processing is affordable. The performance of their circuitry has been analyzed in these terms without a comprehensive study of the ultimate consequences of such moderate accuracy. In this paper, for the first time to the best of our knowledge, we do carry out this study. We move expectable performance of mixed-signal image processing hardware directly into the vision algorithm making use of it. This permits to close a wider design loop, enabling a more aggressive design of this kind of hardware provided that the algorithm, at the highest level—semantic interpretation of the scene—, can afford it. Thus, we present a thorough analysis of the non-idealities associated with the implementation of a QVGA array tailored for the distinctive characteristics of the Viola–Jones processing framework. The resulting deviation models are then introduced in the processing flow of this framework provided by the OpenCV library. We have found, contrary to what could be expected, that these deviations do not necessarily degrade the performance of the Viola–Jones algorithm. They could be even beneficial for certain high-level specifications. Additionally, we demonstrate the architectural advantages of our approach: exploitation of focal-plane distributed memory and ultra-low-power operation. | es |
dc.description.sponsorship | Ministerio de Economía y Competitividad TEC2012-38921-C02-01, IPT-2011-1625-430000 | es |
dc.description.sponsorship | O ce of Naval Research (USA) N000141110312 | es |
dc.description.sponsorship | Centro para el Desarrollo Tecnológico Industrial IPC-20111009 | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | John Wiley & Sons | es |
dc.relation.ispartof | International Journal of Circuit Theory and Applications, 43 (8), 1063-1079. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Viola–Jones framework | es |
dc.subject | Focal-plane sensing-processing | es |
dc.subject | Mixed-signal circuitry | es |
dc.subject | Integral images | es |
dc.subject | Haar-like features | es |
dc.subject | OpenCV library | es |
dc.title | Bottom-up performance analysis of focal-plane mixed-signal hardware for Viola–Jones early vision tasks | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/submittedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.projectID | TEC2012-38921-C02-01 | es |
dc.relation.projectID | IPT-2011-1625-430000 | es |
dc.relation.projectID | N000141110312 | es |
dc.relation.projectID | IPC-20111009 | es |
dc.relation.publisherversion | http://dx.doi.org/10.1002/cta.1996 | es |
dc.identifier.doi | 10.1002/cta.1996 | es |
idus.format.extent | 21 p. | es |
dc.journaltitle | International Journal of Circuit Theory and Applications | es |
dc.publication.volumen | 43 | es |
dc.publication.issue | 8 | es |
dc.publication.initialPage | 1063 | es |
dc.publication.endPage | 1079 | es |
dc.identifier.sisius | 21186105 | es |