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dc.creatorSerrano Gotarredona, Rafaeles
dc.creatorCamuñas Mesa, Luis Alejandroes
dc.creatorSerrano Gotarredona, María Teresaes
dc.creatorLeñero Bardallo, Juan Antonioes
dc.creatorLinares Barranco, Bernabées
dc.date.accessioned2018-07-23T08:40:45Z
dc.date.available2018-07-23T08:40:45Z
dc.date.issued2007
dc.identifier.citationSerrano Gotarredona, R., Camuñas Mesa, L.A., Serrano Gotarredona, M.T., Leñero Bardallo, J.A. y Linares Barranco, B. (2007). The stochastic I-Pot: A circuit block for programming bias currents. IEEE Transactions on Circuits and Systems II: Express Briefs, 54 (9), 760-764.
dc.identifier.issn1549-7747es
dc.identifier.urihttps://hdl.handle.net/11441/77503
dc.description.abstractIn this brief, we present the “Stochastic I-Pot.” It is a circuit element that allows for digitally programming a precise bias current ranging over many decades, from pico-amperes up to hundreds of micro-amperes. I-Pot blocks can be chained within a chip to allow for any arbitrary number of programmable bias currents. The approach only requires to provide the chip with three external pins, the use of an external current measuring instrument, and a computer. This way, once all internal I-Pots have been characterized, they can be programmed through a computer to provide any desired current bias value with very low error. The circuit block turns out to be very practical for experimenting with new circuits (specially when a large number of biases are required), testing wide ranges of biases, introducing means for current mismatch calibration, offsets compensations, etc. using a reduced number of chip pins. We show experimental results of generating bias currents with errors of 0.38% (8 bits) for currents varying from 176 A to 19.6 pA. Temperature effects are characterized.es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherInstitute of Electrical and Electronics Engineerses
dc.relation.ispartofIEEE Transactions on Circuits and Systems II: Express Briefs, 54 (9), 760-764.
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectAnalog circuitses
dc.subjectCurrent-mode circuitses
dc.subjectCurrent biaseses
dc.subjectLow-power circuitses
dc.titleThe stochastic I-Pot: A circuit block for programming bias currentses
dc.typeinfo:eu-repo/semantics/articlees
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadoreses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Electrónica y Electromagnetismoes
dc.relation.publisherversionhttp://dx.doi.org/10.1109/TCSII.2007.900881es
dc.identifier.doi10.1109/TCSII.2007.900881es
idus.format.extent5 p.es
dc.journaltitleIEEE Transactions on Circuits and Systems II: Express Briefses
dc.publication.volumen54es
dc.publication.issue9es
dc.publication.initialPage760es
dc.publication.endPage764es

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