dc.creator | Linares Barranco, Bernabé | es |
dc.creator | Sánchez Sinencio, Edgar | es |
dc.creator | Rodríguez Vázquez, Ángel Benito | es |
dc.creator | Huertas Díaz, José Luis | es |
dc.date.accessioned | 2018-06-29T13:15:42Z | |
dc.date.available | 2018-06-29T13:15:42Z | |
dc.date.issued | 1992 | |
dc.identifier.citation | Linares Barranco, B., Sánchez Sinencio, E., Rodríguez Vázquez, Á.B. y Huertas Díaz, J.L. (1992). A modular T-mode design approach for analog neural network hardware implementations. IEEE Journal of Solid-State Circuits, 27 (5), 701-713. | |
dc.identifier.issn | 0018-9200 | es |
dc.identifier.uri | https://hdl.handle.net/11441/76572 | |
dc.description.abstract | A modular transconductance-mode (T-mode) design approach is presented for analog hardware implementations of neural networks. This design approach is used to build a modular bidirectional associative memory network. The authors show that the size of the whole system can be increased by interconnecting more modular chips. It is also shown that by changing the interconnection strategy different neural network systems can be implemented, such as a Hopfield network, a winner-take-all network, a simplified ART1 network, or a constrained optimization network. Experimentally measured results from CMOS 2-μm double-metal, double-polysilicon prototypes (MOSIS) are presented. | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | IEEE Journal of Solid-State Circuits, 27 (5), 701-713. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | A modular T-mode design approach for analog neural network hardware implementations | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.publisherversion | http://dx.doi.org/10.1109/4.133157 | es |
dc.identifier.doi | 10.1109/4.133157 | es |
idus.format.extent | 13 p. | es |
dc.journaltitle | IEEE Journal of Solid-State Circuits | es |
dc.publication.volumen | 27 | es |
dc.publication.issue | 5 | es |
dc.publication.initialPage | 701 | es |
dc.publication.endPage | 713 | es |