dc.creator | Quintana Toledo, José María | es |
dc.creator | Avedillo de Juan, María José | es |
dc.creator | Huertas Díaz, José Luis | es |
dc.date.accessioned | 2018-06-19T13:41:52Z | |
dc.date.available | 2018-06-19T13:41:52Z | |
dc.date.issued | 2001 | |
dc.identifier.citation | Quintana Toledo, J.M., Avedillo de Juan, M.J. y Huertas Díaz, J.L. (2001). Efficient realization of a threshold voter for self-purging redundancy. Journal of Electronic Testing, 17 (1), 69-73. | |
dc.identifier.issn | 0923-8174 | es |
dc.identifier.issn | 1573-0727 | es |
dc.identifier.uri | https://hdl.handle.net/11441/76322 | |
dc.description.abstract | The self-purging technique is not commonly used mainly due to the lack of practical implementations of its key component, the threshold voter. A very efficient implementation of this voter is presented which uses a decomposition technique to substantially reduce the circuit complexity and delay, as compared to alternative implementations. | es |
dc.description.sponsorship | Comisión Interministerial de Ciencia y Tecnología TIC97-0648 | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Springer | es |
dc.relation.ispartof | Journal of Electronic Testing, 17 (1), 69-73. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Self-purging Redundancy | es |
dc.subject | Fault Tolerance | es |
dc.subject | Sorting Networks | es |
dc.subject | Threshold Logic | es |
dc.title | Efficient realization of a threshold voter for self-purging redundancy | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/submittedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.projectID | TIC97-0648 | es |
dc.relation.publisherversion | http://dx.doi.org/10.1023/A:1011106228550 | es |
dc.identifier.doi | 10.1023/A:1011106228550 | es |
idus.format.extent | 8 p. | es |
dc.journaltitle | Journal of Electronic Testing | es |
dc.publication.volumen | 17 | es |
dc.publication.issue | 1 | es |
dc.publication.initialPage | 69 | es |
dc.publication.endPage | 73 | es |
dc.contributor.funder | Comisión Interministerial de Ciencia y Tecnología (CICYT). España | |