dc.creator | Linares Barranco, Bernabé | es |
dc.creator | Serrano Gotarredona, María Teresa | es |
dc.creator | Serrano Gotarredona, Rafael | es |
dc.date.accessioned | 2018-06-15T14:46:09Z | |
dc.date.available | 2018-06-15T14:46:09Z | |
dc.date.issued | 2003 | |
dc.identifier.citation | Linares Barranco, B., Serrano Gotarredona, M.T. y Serrano Gotarredona, R. (2003). Compact low-power calibration mini-DACs for neural arrays with programmable weights. IEEE Transactions on Neural Networks, 14 (5), 1207-1216. | |
dc.identifier.issn | 1045-9227 | es |
dc.identifier.issn | 1941-0093 | es |
dc.identifier.uri | https://hdl.handle.net/11441/76270 | |
dc.description.abstract | This paper considers the viability of compact low-resolution low-power mini digital-to-analog converters (mini-DACs) for use in large arrays of neural type cells, where programmable weights are required. Transistors are biased in weak inversion in order to yield small currents and low power consumptions, a necessity when building large size arrays. One important drawback of weak inversion operation is poor matching between transistors. The resulting effective precision of a fabricated array of 50 DACs turned out to be 47% (1.1 bits), due to transistor mismatch. However, it is possible to combine them two by two in order to build calibrated DACs, thus compensating for inter-DAC mismatch. It is shown experimentally that the precision can be improved easily by a factor of 10 (4.8% or 4.4 bits), which makes these DACs viable for low-resolution applications such as massive arrays of neural processing circuits. A design methodology is provided, and illustrated through examples, to obtain calibrated mini-DACs of a given target precision. As an example application, we show simulation results of using this technique to calibrate an array of digitally controlled integrate-and-fire neurons. | es |
dc.description.sponsorship | Gobierno de España TIC1999-0446-C02-02, TIC2000-0406-P4-05, FIT-07000/2002/921, TIC2002-10878-E | es |
dc.description.sponsorship | European Union IST- 2001-34124 | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | IEEE Transactions on Neural Networks, 14 (5), 1207-1216. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Analog design | es |
dc.subject | Calibration | es |
dc.subject | Current splitters | es |
dc.subject | Digital-to-analog converters | es |
dc.subject | Fuzzy circuits | es |
dc.subject | Neural networks | es |
dc.subject | Subthreshold | es |
dc.subject | Weak inversion | es |
dc.title | Compact low-power calibration mini-DACs for neural arrays with programmable weights | es |
dc.type | info:eu-repo/semantics/article | es |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessrights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores | es |
dc.relation.projectID | TIC1999-0446-C02-02 | es |
dc.relation.projectID | TIC2000-0406-P4-05 | es |
dc.relation.projectID | FIT-07000/2002/921 | es |
dc.relation.projectID | TIC2002-10878-E | es |
dc.relation.projectID | IST- 2001-34124 | es |
dc.relation.publisherversion | http://dx.doi.org/10.1109/TNN.2003.816370 | es |
dc.identifier.doi | 10.1109/TNN.2003.816370 | es |
idus.format.extent | 10 p. | es |
dc.journaltitle | IEEE Transactions on Neural Networks | es |
dc.publication.volumen | 14 | es |
dc.publication.issue | 5 | es |
dc.publication.initialPage | 1207 | es |
dc.publication.endPage | 1216 | es |
dc.contributor.funder | Gobierno de España | |
dc.contributor.funder | European Union (UE) | |