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dc.creatorPérez Carrasco, José Antonioes
dc.creatorAcha Piñero, Begoñaes
dc.creatorSerrano Gotarredona, María del Carmenes
dc.creatorCamuñas Mesa, Luis Alejandroes
dc.creatorSerrano Gotarredona, María Teresaes
dc.creatorLinares Barranco, Bernabées
dc.date.accessioned2018-03-26T13:28:18Z
dc.date.available2018-03-26T13:28:18Z
dc.date.issued2010
dc.identifier.citationPérez Carrasco, J.A., Acha Piñero, B., Serrano Gotarredona, M.d.C., Camuñas Mesa, L.A., Serrano Gotarredona, M.T. y Linares Barranco, B. (2010). Fast vision through frameless event-based sensing and convolutional processing: Application to texture recognition. IEEE Transactions on Neural Networks, 21 (4), 609-620.
dc.identifier.issn1045-9227es
dc.identifier.urihttps://hdl.handle.net/11441/71324
dc.description.abstractAddress-event representation (AER) is an emergent hardware technology which shows a high potential for providing in the near future a solid technological substrate for emulating brain-like processing structures. When used for vision, AER sensors and processors are not restricted to capturing and processing still image frames, as in commercial frame-based video technology, but sense and process visual information in a pixel-level event-based frameless manner. As a result, vision processing is practically simultaneous to vision sensing, since there is no need to wait for sensing full frames. Also, only meaningful information is sensed, communicated, and processed. Of special interest for brain-like vision processing are some already reported AER convolutional chips, which have revealed a very high computational throughput as well as the possibility of assembling large convolutional neural networks in a modular fashion. It is expected that in a near future we may witness the appearance of large scale convolutional neural networks with hundreds or thousands of individual modules. In the meantime, some research is needed to investigate how to assemble and configure such large scale convolutional networks for specific applications. In this paper, we analyze AER spiking convolutional neural networks for texture recognition hardware applications. Based on the performance figures of already available individual AER convolution chips, we emulate large scale networks using a custom made event-based behavioral simulator. We have developed a new event-based processing architecture that emulates with AER hardware Manjunath's frame-based feature recognition software algorithm, and have analyzed its performance using our behavioral simulator. Recognition rate performance is not degraded. However, regarding speed, we show that recognition can be achieved before an equivalent frame is fully sensed and transmitted.es
dc.description.sponsorshipMinisterio de Educación y Ciencia TEC-2006-11730-C03-01es
dc.description.sponsorshipJunta de Andalucía P06-TIC-01417es
dc.description.sponsorshipEuropean Union IST-2001-34124, 216777es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherInstitute of Electrical and Electronics Engineerses
dc.relation.ispartofIEEE Transactions on Neural Networks, 21 (4), 609-620.
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectAddress–event representation (AER)es
dc.subjectAER chipses
dc.subjectConvolutional neural networkses
dc.subjectEvent coding and processinges
dc.subjectRealtime vision hardware processinges
dc.subjectSpike signal processinges
dc.subjectTexture retrievales
dc.subjectVision chipses
dc.titleFast vision through frameless event-based sensing and convolutional processing: Application to texture recognitiones
dc.typeinfo:eu-repo/semantics/articlees
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Teoría de la Señal y Comunicacioneses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Teoría de la Señal y Comunicacioneses
dc.relation.projectIDTEC-2006-11730-C03-01es
dc.relation.projectIDP06-TIC-01417es
dc.relation.projectIDIST-2001-34124es
dc.relation.projectID216777es
dc.relation.publisherversionhttp://dx.doi.org/10.1109/TNN.2009.2039943es
dc.identifier.doi10.1109/TNN.2009.2039943es
idus.format.extent12 p.es
dc.journaltitleIEEE Transactions on Neural Networkses
dc.publication.volumen21es
dc.publication.issue4es
dc.publication.initialPage609es
dc.publication.endPage620es

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