Static Power Consumption in CMOS Gates Using Independent Bodies

Guerrero Martos, David; Millán Calderón, Alejandro; Juan Chico, Jorge; Bellido Díaz, Manuel Jesús; Ruiz de Clavijo Vázquez, Paulino; Ostúa Arangüena, Enrique; Viejo Cortés, Julián

doi:10.1007/978-3-540-74442-9_39

Capítulo de Libro

dc.creator	Guerrero Martos, David	es
dc.creator	Millán Calderón, Alejandro	es
dc.creator	Juan Chico, Jorge	es
dc.creator	Bellido Díaz, Manuel Jesús	es
dc.creator	Ruiz de Clavijo Vázquez, Paulino	es
dc.creator	Ostúa Arangüena, Enrique	es
dc.creator	Viejo Cortés, Julián	es
dc.date.accessioned	2017-01-24T09:05:49Z
dc.date.available	2017-01-24T09:05:49Z
dc.date.issued	2007
dc.identifier.citation	Guerrero Martos, D., Millán Calderón, A.,...,Viejo Cortés, J. (2007). Static Power Consumption in CMOS Gates Using Independent Bodies. En Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2007. Lecture Notes in Computer Science, vol 4644 (pp. 404-412). Berlin: Springer.
dc.identifier.isbn	978-3-540-74441-2	es
dc.identifier.issn	0302-9743	es
dc.identifier.uri	http://hdl.handle.net/11441/52621
dc.description.abstract	It has been reported that the use of independent body terminals for series transistors in static bulk-CMOS gates improves their timing and dynamic power characteristics. In this paper, the static power consumption of gates using this approach is addressed. When compared to conventional common body static CMOS, important static power enhancements are obtained. Accurate electrical simulation results reveals improvements up to 35% and 62% in NAND and NOR gates respectively.	es
dc.description.sponsorship	Ministerio de Educación y Ciencia META TEC-2004-00840-MIC
dc.description.sponsorship	Junta de Andalucía CICE DHPMNDS EXC-TIC-1023
dc.description.sponsorship	Junta de Andalucía CICE DHPMNDS EXC-TIC-635
dc.format	application/pdf	es
dc.language.iso	eng	es
dc.publisher	Springer	es
dc.relation.ispartof	Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2007. Lecture Notes in Computer Science, vol 4644	es
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/	*
dc.title	Static Power Consumption in CMOS Gates Using Independent Bodies	es
dc.type	info:eu-repo/semantics/bookPart	es
dcterms.identifier	https://ror.org/03yxnpp24
dc.type.version	info:eu-repo/semantics/acceptedVersion	es
dc.rights.accessRights	info:eu-repo/semantics/openAccess	es
dc.contributor.affiliation	Universidad de Sevilla. Departamento de Tecnología Electrónica	es
dc.relation.projectID	TEC-2004-00840-MIC	es
dc.relation.projectID	EXC-TIC-1023	es
dc.relation.projectID	EXC-TIC-635	es
dc.relation.publisherversion	http://link.springer.com/chapter/10.1007%2F978-3-540-74442-9_39	es
dc.identifier.doi	10.1007/978-3-540-74442-9_39	es
dc.contributor.group	Universidad de Sevilla. TIC204: Investigación y Desarrollo Digital (ID2)
idus.format.extent	9	es
dc.publication.initialPage	404	es
dc.publication.endPage	412	es
dc.relation.publicationplace	Berlin	es

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