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dc.creatorMillán Calderón, Alejandroes
dc.creatorBellido Díaz, Manuel Jesúses
dc.creatorJuan Chico, Jorgees
dc.creatorGuerrero Martos, Davides
dc.creatorRuiz de Clavijo Vázquez, Paulinoes
dc.creatorOstúa Arangüena, Enriquees
dc.date.accessioned2017-01-20T10:06:03Z
dc.date.available2017-01-20T10:06:03Z
dc.date.issued2003
dc.identifier.citationMillán Calderón, A., Bellido Díaz, M.J., Juan Chico, J., Guerrero Martos, D., Ruiz de Clavijo Vázquez, P. y Ostua Arangüena, E. (2003). Internode: Internal Node Logic Computational Model. En 36th Annual Simulation Symposium (ANSS-36 2003) (241-248), Orlando, Florida: IEEE Computer Society.
dc.identifier.isbn0-7695-1911-3es
dc.identifier.issn1080-241Xes
dc.identifier.urihttp://hdl.handle.net/11441/52523
dc.description.abstractIn this work, we present a computational behavioral model for logic gates called Internode (Internal Node Logic Computational Model) that considers the functionality of the gate as well as all the different internal states the gate can reach. This computational model can be used in logiclevel tools and is valid for any dynamic behavioral model (delay models, power models, switching noise models, etc.). Also, we show a very efficient implementation of the model, in C language, for -inputs SCMOS NOR/NAND gates. Finally, we demonstrate the functionality of the model showing three different examples of modeling: (a) a propagation delay model, (b) the degradation delay model (DDM), and (c) a simple power modeles
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherIEEE Computer Societyes
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titleInternode: Internal Node Logic Computational Modeles
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Tecnología Electrónicaes
dc.relation.projectIDTIC 2000-1350es
dc.relation.projectIDTIC 2002-2283es
dc.relation.publisherversionhttp://ieeexplore.ieee.org/document/1192819/es
dc.identifier.doi10.1109/SIMSYM.2003.1192819es
idus.format.extent8es
dc.publication.initialPage241es
dc.publication.endPage248es
dc.eventtitle36th Annual Simulation Symposium, ANSS-36es
dc.eventinstitutionOrlando, Floridaes
dc.relation.publicationplaceUSAes

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