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Stochastic pulse coded arithmetic
dc.creator | Toral, S. L. | es |
dc.creator | Quero Reboul, José Manuel | es |
dc.creator | García Franquelo, Leopoldo | es |
dc.date.accessioned | 2015-03-26T08:28:28Z | |
dc.date.available | 2015-03-26T08:28:28Z | |
dc.date.issued | 1999 | es |
dc.identifier.isbn | 0-7803-5482-6 | |
dc.identifier.isbn | 0-7803-5482-6 | |
dc.identifier.uri | http://hdl.handle.net/11441/23594 | |
dc.description.abstract | Among the different pulse codification techniques, stochastic pulse codification has its own arithmetic based on the similarity between Boolean algebra and statistical algebra. Summation and multiplication are the two basic arithmetic operations treated in depth in the literature. In this paper we present two digital stochastic circuits that extend traditional stochastic algebra: a division circuit and a square-root circuit, and the interfaces between the analog and stochastic domain. As a result, we are able to process analog input signals with a simple and complete processing system. These circuits can be implemented in low-cost and low-power digital programmable devices. | en |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | IEEE | |
dc.relation.ispartof | International Symposium On Circuits And Systems (ISCAS 2000), 1, 599 - 602. Ginebra, Suiza : IEEE | es |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | es |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | es |
dc.title | Stochastic pulse coded arithmetic | en |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Ingeniería Electrónica | es |
dc.relation.publisherversion | 10.1109/ISCAS.2000.857166 | |
dc.identifier.idus | https://idus.us.es/xmlui/handle/11441/23594 |
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