Artículo
A CMOS-memristor hybrid system for implementing stochastic binary spike timing-dependent plasticity
Autor/es | Ahmadi-Farsani, Javad
Ricci, Saverio Hashemkhani, Shahin Ielmini, Daniele Linares Barranco, Bernabé Serrano Gotarredona, María Teresa |
Departamento | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores |
Fecha de publicación | 2022 |
Fecha de depósito | 2024-02-15 |
Publicado en |
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Resumen | This paper describes a fully experimental hybrid system in which a 4 × 4 memristive crossbar spiking neural network (SNN) was assembled using custom high-resistance state memristors with analogue CMOS neurons fabricated ... This paper describes a fully experimental hybrid system in which a 4 × 4 memristive crossbar spiking neural network (SNN) was assembled using custom high-resistance state memristors with analogue CMOS neurons fabricated in 180nm CMOS technology. The custom memristors used NMOS selector transistors, made available on a second 180nm CMOS chip. One drawback is that memristors operate with currents in the micro-Amperes range, while analogue CMOS neurons may need to operate with currents in the pico-Amperes range. One possible solution was to use a compact circuit to scale the memristor-domain currents down to the analogue CMOS neuron domain currents by at least 5 6 orders of magnitude. Here, we proposed using an on-chip compact current splitter circuit based on MOS ladders to aggressively attenuate the currents by over 5 orders of magnitude. This circuit was added before each neuron. This paper describes the proper experimental operation of an SNN circuit using a 4 × 4 1T1R synaptic crossbar together with four post-synaptic CMOS circuits, each with a 5-decade current attenuator and an integrateand-fire neuron. It also demonstrates one-shot winnertakes-all training and stochastic binary spike-Timingdependent-plasticity learning using this small system. This article is part of the theme issue 'Advanced neurotechnologies: Translating innovation for health and well-being. |
Agencias financiadoras | European Commission (EC). Fondo Europeo de Desarrollo Regional (FEDER) Ministerio de Economía y Competitividad (MINECO). España Horizonte 2020 (Unión Europea) |
Identificador del proyecto | TEC2015-63884-C2-1-P
PID2019-105556GB-C31 871371 824164 |
Cita | Ahmadi-Farsani, J., Ricci, S., Hashemkhani, S., Ielmini, D., Linares Barranco, B. y Serrano Gotarredona, M.T. (2022). A CMOS-memristor hybrid system for implementing stochastic binary spike timing-dependent plasticity. Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences, 380 (2228), Article number 20210018. https://doi.org/10.1098/rsta.2021.0018. |
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