Ponencia
Maximum Operating Frequency Self-Tuning System on FPGAs Using Dynamic Reconfiguration
Autor/es | Fernández García, Carlos
Hakobyan, Aleksan Jiménez Fernández, Carlos Jesús |
Departamento | Universidad de Sevilla. Departamento de Tecnología Electrónica |
Fecha de publicación | 2023-12 |
Fecha de depósito | 2024-01-19 |
Publicado en |
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ISBN/ISSN | 979-8-3503-0385-8 |
Resumen | This paper proposes the use of a dynamic clock
frequency reconfiguration technique to optimize the performance
of a circuit by changing its clock frequency to achieve the
maximum operating frequency. The proposed technique ... This paper proposes the use of a dynamic clock frequency reconfiguration technique to optimize the performance of a circuit by changing its clock frequency to achieve the maximum operating frequency. The proposed technique uses an FPGA reconfigurable clock generator circuit that changes the generated clock frequency for a circuit in real time. By systematically increasing the clock frequency and monitoring the response of the circuit, the real maximum operating frequency can be determined. The effectiveness of the proposed technique is demonstrated through simulation and experimental results with the development of an experimental system. The results show that it can accurately determine the maximum operating frequency of a circuit while maintaining its reliability and integrity. |
Agencias financiadoras | European Union’s Horizon 2020 No. 952622 FEDER 2014- 2020 and Consejería de Economía, Conocimiento, Empresas y Universidad de la Junta de Andalucía under Project US- 1380823 MCIN/AEI/10.13039/501100011033 Grant PID2020-116664RB-I00 |
Identificador del proyecto | EU H2020 952622
US- 1380823 PID2020-116664RB-I00 |
Cita | Fernández García, C., Hakobyan, A. y Jiménez Fernández, C.J. (2023). Maximum Operating Frequency Self-Tuning System on FPGAs Using Dynamic Reconfiguration. En 2023. 38th Conference on Design of Circuits and Integrated Systems (DCIS), Málaga, Spain. |
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