Ponencia
IC-LDO Regulator with 600 nA Quiescent Current Using a Class AB Buffer
Autor/es | Hinojo Montero, José María
Luján Martínez, Clara Isabel López Morillo, Enrique Torralba Silgado, Antonio Jesús |
Departamento | Universidad de Sevilla. Departamento de Ingeniería Electrónica |
Fecha de publicación | 2018-11-14 |
Fecha de depósito | 2023-07-13 |
Resumen | An ultra-low power Internally Compensated Low- Dropout (IC-LDO) regulator with a quiescent current consumption lower than 600 nA is proposed. It is based on the classical IC-LDO topology, which has been modified to include ... An ultra-low power Internally Compensated Low- Dropout (IC-LDO) regulator with a quiescent current consumption lower than 600 nA is proposed. It is based on the classical IC-LDO topology, which has been modified to include a class AB buffer between the output of the error amplifier and the gate of the pass transistor (MPASS). This way, a fast charge/discharge of its parasitic capacitance is achieved with the inherent low quiescent power consumption of class AB circuits. The proposed regulator has been fabricated in a standard 0.18- μm CMOS technology. Experimental results show that the proposed regulator has a Figure of Merit in the state of the art. |
Ficheros | Tamaño | Formato | Ver | Descripción |
---|---|---|---|---|
1_dcis2018.pdf | 240.5Kb | [PDF] | Ver/ | |