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Artículo
CMOS First-Order All-Pass Filter With 2-Hz Pole Frequency
Autor/es | Paul, Anindita
Ramírez Angulo, Jaime López Martín, Antonio J. González Carvajal, Ramón |
Departamento | Universidad de Sevilla. Departamento de Ingeniería Electrónica |
Fecha de publicación | 2018 |
Fecha de depósito | 2023-01-20 |
Publicado en |
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Resumen | A CMOS fully integrated all-pass filter with an extremely low pole frequency of 2 Hz is introduced in this paper. It has 0.08-dB passband ripple and 0.029-mm 2 Si area. It has 0.38-mW power consumption in strong inversion ... A CMOS fully integrated all-pass filter with an extremely low pole frequency of 2 Hz is introduced in this paper. It has 0.08-dB passband ripple and 0.029-mm 2 Si area. It has 0.38-mW power consumption in strong inversion with ±0.6-V power supplies. In subthreshold, it has 0.64-μW quiescent power and operates with ±200-mV dc supplies. Miller multiplication is used to obtain a large equivalent capacitor without excessive Si area. By varying the gain of the Miller amplifier, the pole frequency can be varied from 2 to 48 Hz. Experimental and simulation results of a test chip prototype in 130-nm CMOS technology validate the proposed circuit. |
Cita | Paul, A., Ramírez Angulo, J., López Martín, A.J. y González Carvajal, R. (2018). CMOS First-Order All-Pass Filter With 2-Hz Pole Frequency. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 27 (2), 294-303. https://doi.org/10.1109/TVLSI.2018.2878017. |
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08528883Anindita.pdf | 58.00Mb | [PDF] | Ver/ | |