dc.creator | Núñez Martínez, Juan | es |
dc.creator | Avedillo de Juan, María José | es |
dc.creator | Quintana Toledo, José María | es |
dc.date.accessioned | 2022-07-13T11:24:55Z | |
dc.date.available | 2022-07-13T11:24:55Z | |
dc.date.issued | 2013 | |
dc.identifier.citation | Núñez Martínez, J., Avedillo de Juan, M.J. y Quintana Toledo, J.M. (2013). Two-Phase MOBILE Interconnection Schemes for Ultra-Grain Pipeline Applications. En PATMOS 2012 International Workshop on Power and Timing Modeling, Optimization and Simulation (166-174), Newcastle, UK: Springer. | |
dc.identifier.isbn | 978-3-642-36156-2 | es |
dc.identifier.uri | https://hdl.handle.net/11441/135309 | |
dc.description.abstract | Monostable to Bistable (MOBILE) gates are very suitable for the implementation of gate-level pipelines which can be achieved without resorting to memory elements. MOBILE operating principle is implemented using two series connected Negative Differential Resistance (NDR) devices with a clocked bias. This paper describes and experimentally validates a two-phase clock scheme for such MOBILE based ultra-grain pipelines. Up to our knowledge it is the first MOBILE working circuit reported with this interconnection architecture. The proposed interconnection architecture is applied to the design of a 4-bit Carry Look-ahead Adder. | es |
dc.description.sponsorship | Ministerio de Economía y Competitividad del Gobierno de España with support from ERDF under Project TEC2010-18937 | es |
dc.format.extent | 9 p. | es |
dc.language.iso | eng | es |
dc.publisher | Springer | es |
dc.relation.ispartof | PATMOS 2012 International Workshop on Power and Timing Modeling, Optimization and Simulation (2013), pp. 166-174. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | Negative Differential Resistance (NDR) | es |
dc.subject | Nanopipeline | es |
dc.subject | Monostable to Bistable Logic Elements (MOBILE) | es |
dc.title | Two-Phase MOBILE Interconnection Schemes for Ultra-Grain Pipeline Applications | es |
dc.type | info:eu-repo/semantics/conferenceObject | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.projectID | TEC2010-18937 | es |
dc.relation.publisherversion | https://dx.doi.org/10.1007/978-3-642-36157-9_17 | es |
dc.identifier.doi | 10.1007/978-3-642-36157-9_17 | es |
dc.publication.initialPage | 166 | es |
dc.publication.endPage | 174 | es |
dc.eventtitle | PATMOS 2012 International Workshop on Power and Timing Modeling, Optimization and Simulation | es |
dc.eventinstitution | Newcastle, UK | es |
dc.contributor.funder | Ministerio de Economía y Competitividad (MINECO). España | es |
dc.contributor.funder | European Commission (EC). Fondo Europeo de Desarrollo Regional (FEDER) | es |