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Mostrando ítems 1-5 de 5
Ponencia
Learning VHDL through teamwork FPGA game design
(IEEE Computer Society, 2020)
The learning of digital design at the RT level by the students improves with practical work, which can be developed in teams, allow both the gradual advance of complexity as the learning progresses, and the proposal to ...
Ponencia
FPGA design example for maximum operating frequency measurements
(IEEE Computer Society, 2018)
The best way to learn how to design digital systems at the RT level is to use practical examples. In addition, from a teaching point of view, the more practical they are, the more attractive to students. But for a design ...
Ponencia
Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipher
(IEEE Computer Society, 2018)
The fault injection in ciphers operation is a very successful mechanism to attack them. The inclusion of elements of protection against this kind of attacks is more and more necessary. These mechanisms are usually based ...
Ponencia
Distance measurement as a practical example of FPGA design
(IEEE Computer Society, 2018)
Digital design learning at the RT level requires practical examples and as learning progresses, the examples need to become more complex. FPGAs and development boards offer a very suitable platform for the implementation ...
Ponencia
Desarrollo de un juego sobre FPGA mediante trabajo en equipo
(Asociación Tecnología, Aprendizaje y Enseñanza de la Electrónica (TAEE), 2020)
El aprendizaje de diseño digital a nivel RT por los alumnos mejora con trabajos prácticos, desarrollables en equipo, que permitan tanto el avance gradual de complejidad conforme se avanza en el aprendizaje como que la ...