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Mostrando ítems 11-17 de 17
Ponencia
Algorithms to get the maximum operation frequency for skew-tolerant clocking schemes
(Society of Photo-Optical Instrumentation Engineers (SPIE), 2005)
Nowadays it is not possible to neglect the delay of interconnection lines. The die size is rising very fast, and the delay of the interconnection lines grows quadrically with it. Also, the fact that the gate delay keeps ...
Ponencia
Automatic logic synthesis for parallel alternating latches clocking schemes
(SPIE Digital Library, 2007)
This paper proposes a VHDL coding technique that allows for the automatic synthesis of digital circuits using the so called Parallel Alternating Latches Clocking Schemes (PALACS). The proposed method greatly improves ...
Capítulo de Libro
Logic-Level Fast Current Simulation for Digital CMOS Circuits
(Springer, 2005)
Nowadays, verification of digital integrated circuit has been focused more and more from the timing and area field to current and power estimations. The main problem with this kind of verification is on the lack of ...
Ponencia
Design and Implementation of a SNTP Client on FPGA
(IEEE Computer Society, 2008)
This contribution presents the design and implementation of a SNTP client module suitable for IEC 61850 environments fully done in hardware. The module is able to provide synchronization and accurate time reference ...
Ponencia
Desarrollo en VHDL de un filtro digital genérico basado en estructuras canónicas.
(Universidad Politécnica de Madrid, 2006)
Este trabajo abarca la realización de un filtro digital a bajo nivel. El diseño propuesto se basa en la utilización de un lenguaje de descripción de hardware (VHDL) así como de una estructura canónica para la implementación ...
Ponencia
Diseño e implementación de SOPC basados en el microprocesador Picoblaze
(Universidad Politécnica de Madrid, 2006)
Con este trabajo pretendemos realizar una aportación a la docencia de la materias que cubren el diseño de SoPC (System on Programmable Chip). Para ello, hemos desarrollado un demostrador de diseño de un SoPC suficientemente ...
Ponencia
Python as a hardware description language: A case study
(IEEE Computer Society, 2011)
Many people may see the development of software and hardware like different disciplines. However, there are great similarities between them that have been shown due to the appearance of extensions for general purpose ...