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Mostrando ítems 1-10 de 22
Ponencia
FPGA Implementations Comparison of Neuro-cortical Inspired Convolution Processors for Spiking Systems
(Springer, 2009)
Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In ...
Artículo
An eLearning Standard Approach for Supporting PBL in Computer Engineering
(IEEE Computer Society, 2009)
Problem-based learning (PBL) has proved to be a highly successful pedagogical model in many fields, although it is not that common in computer engineering. PBL goes beyond the typical teaching methodology by promoting ...
Ponencia
Open Source Virtual Worlds and Low Cost Sensors for Physical Rehab of Patients with Chronic Diseases
(Springer, 2009)
For patients with chronic diseases, exercise is a key part of rehab to deal better with their illness. Some of them do rehabilitation at home with telemedicine systems. However, keeping to their exercising program is ...
Ponencia
Towards an intelligent and supportive environment for people with physical or cognitive restrictions
(ACM, 2009)
AmbienNet environment has been developed with the aim of demonstrating the feasibility of accessible intelligent environments designed to support people with disabilities and older persons living independently. Its ...
Ponencia
Synthetic retina for AER systems development
(IEEE Computer Society, 2009)
Neuromorphic engineering tries to mimic biology in information processing. Address-Event Representation (AER) is a neuromorphic communication protocol for spiking neurons between different layers. AER bio-inspired image ...
Ponencia
Implementation of a time-warping AER mapper
(IEEE Computer Society, 2009)
In recent implementations of neuromorphic spikebased sensors, multi-neuron processors, and actuators; the spike traffic between devices is coded in the form of asynchronous spike streams following the Address-Event-Re ...
Artículo
Chrono-Scheduling; a simplified dynamic scheduling algorithm for timing predictable processors
(World Scientific Connecting Great MInds, 2009)
We propose a simpler and latency-reduced instruction scheduler, called chronoscheduling algorithm, which avoids large and difficult instruction wake-up in order to reduce power consumption and latencies. The key idea of ...
Ponencia
OTA-C oscillator with low frequency variations for on-chip clock generation in serial LVDS-AER links
(IEEE Computer Society, 2009)
This paper presents the design and simulation of an OTA-C oscillator intended to be used as on-chip frequency reference. This reference will be part of the high speed clock generation circuit for Manchester serial LVDS-AER ...
Ponencia
Performance study of synthetic AER generation on CPUs for Real-Time Video based on Spikes
(ACM Digital Library, 2009-07)
Address-Event-Representation (AER) is a neuromorphic interchip communication protocol that allows for real-time virtual massive connectivity between huge number neurons located on different chips. When building multi-chip ...
Ponencia
Advanced Vision Processing Systems: Spike-Based Simulation and Processing
(Springer, 2009)
In this paper we briefly summarize the fundamental properties of spike events processing applied to artificial vision systems. This sensing and processing technology is capable of very high speed throughput, because it ...