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Artículo
A CMOS-memristor hybrid system for implementing stochastic binary spike timing-dependent plasticity
(Royal Society Publishing, 2022)
This paper describes a fully experimental hybrid system in which a 4 × 4 memristive crossbar spiking neural network (SNN) was assembled using custom high-resistance state memristors with analogue CMOS neurons fabricated ...
Ponencia
A signed spatial contrast event spike retina chip
(IEEE Computer Society, 2010)
Reported AER (Address Event Representation) contrast retinae perform a contrast computation based on the ratio between a pixel's local light intensity and a spatially weighted average of its neighbourhood. This results in ...
Ponencia
Performance Comparison of Time-Step-Driven versus Event-Driven Neural State Update Approaches in SpiNNaker
(IEEE. Institute of Electrical and Electronics Engineers, 2018)
The SpiNNaker chip is a multi-core processor optimized for neuromorphic applications. Many SpiNNaker chips are assembled to make a highly parallel million core platform. This system can be used for simulation of a large ...
Ponencia
Design of adaptive nano/CMOS neural architectures
(IEEE Computer Society, 2012)
Memristive devices are a promising technology to implement dense learning synapse arrays emulating the high memory capacity and connectivity of biological brains. Recently, the implementation of STDP learning in memristive ...
Tesis Doctoral