Listar Ponencias (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por título
Mostrando ítems 172-191 de 307
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Ponencia
Focal-plane generation of multi-resolution and multi-scale image representation for low-power vision applications
(The International Society for Optics and Photonics, 2011)Early vision stages represent a considerably heavy computational load. A huge amount of data needs to be processed under ...
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Ponencia
Focal-Plane Scale Space Generation with a 6T Pixel Architecture
(Society for Imaging Science and Technology, 2016)Aiming at designing a CMOS image sensor that combines high fill factor and focal-plane implementation of instrumental image ...
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Ponencia
Form Factor Improvement of Smart-Pixels for Vision Sensors through 3-D Vertically- Integrated Technologies
(Institute of Electrical and Electronics Engineers, 2014)While conventional CMOS active pixel sensors embed only the circuitry required for photo-detection, pixel addressing and ...
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Ponencia
Four-quadrant one-transistor-synapse for high-density CNN implementations
(Institute of Electrical and Electronics Engineers, 1998)Presents a linear four-quadrants, electrically-programmable, one-transistor synapse strategy applicable to the implementation ...
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FPGA implementation of an embedded face detection system based on LEON3
(2012)This paper presents an FPGA face detection embedded system. In order achieve acceleration in the face detection process ...
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Frequency tuning loop for VCOs
(Institute of Electrical and Electronics Engineers, 1991)A frequency tuning circuit is introduced for VCOs (voltage-controlled oscillators) so that the final relationship between ...
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Ponencia
Gaussian Pyramid Extraction with a CMOS Vision Sensor
(Institute of Electrical and Electronics Engineers, 2014)This paper addresses a CMOS vision sensor with 176 × 120 pixels in standard 0.18 μm CMOS technology that computes the ...
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Ponencia
Generation and design of sinusoidal oscillators using OTAS
(Institute of Electrical and Electronics Engineers, 1988)The design of voltage-controlled oscillators (VCOs) using operational transconductance amplifiers (OTAs) is discussed. ...
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Ponencia
Generation of technology-portable flexible analog blocks
(Institute of Electrical and Electronics Engineers, 2002)This paper introduces a complete methodology for retargeting of analog blocks to different sets of specifications, even ...
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Ponencia
Geometrically-constrained, parasitic-aware synthesis of analog ICs
(The International Society for Optical Engineering - SPIE, 2005)In order to speed up the design process of analog ICs, iterations between different design stages should be avoided as ...
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Ponencia
Hardware Implementation of a Biometric Recognition Algorithm based on In-Air Signature
(IEEE, 2015-06-01)This paper presents the design of a prototype for a wearable device that implements a recognition system based on in-air ...
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Ponencia
Hardware-Aware Performance Evaluation for the Co-Design of Image Sensors and Vision Algorithms
(Institute of Electrical and Electronics Engineers, 2016)The top-down approach to system design allows obtaining separate specifications for each subsystem. In the case of vision ...
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Hardware/software codesign methodology for fuzzy controller implementation
(Institute of Electrical and Electronics Engineers, 2002)This paper describes a HW/SW codesign methodology for the implementation of fuzzy controllers on a platform composed by ...
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Ponencia
Harmonic Distortion in Fully-Differential Switched-Current Sigma-Delta Modulators
(1999)This paper presents a systematic analysis of the harmonic distortion in SD modulators (SDMs) implemented with ...
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Ponencia
Herramienta para el aprendizaje de un sistema de adquisición de datos
(2010)Se presenta un paquete de software didáctico que facilita el proceso de enseñanza/aprendizaje de la electrónica, orientado ...
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Herramientas de CAD para la síntesis de sistemas de interferencia difusos mediante FPGAs
(2002)En esta comunicación se describe un flujo de diseño que permite automatizar el proceso de síntesis sobre FPGAs de sistemas ...
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High-dynamic range tone-mapping algorithm for focal plane processors
(The International Society for Optics and Photonics, 2011)This paper presents a Dynamic Range improvement technique which is specially well-suited to be implemented in Focal Plane ...
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Ponencia
High-Level Performance Evaluation of Object Detection Based on Massively Parallel Focal-Plane Acceleration Requiring Minimum Pixel Area Overhead
(Springer, 2016)Smart CMOS image sensors can leverage the inherent data-level parallelism and regular computational flow of early vision ...
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Ponencia
High-order cascade multibit /spl Sigma//spl Delta/ modulators for xDSL applications
(Institute of Electrical and Electronics Engineers, 2000)This paper explores the use of /spl Sigma//spl Delta/ modulators for A/D conversion in xDSL applications. Two high-order ...