• Artículo
      Icon

      A practical floating-gate Muller-C element using vMOS threshold gates 

      Rodríguez Villegas, Esther; Huertas Sánchez, Gloria; Avedillo de Juan, María José; Quintana Toledo, José María; Rueda Rueda, Adoración (Institute of Electrical and Electronics Engineers, 2001)
      This paper presents the rationale for vMOS-based realizations of digital circuits when logic design techniques based on ...
    • Artículo
      Icon

      nu MOS-based sorter for arithmetic applications 

      Rodríguez Villegas, Esther; Avedillo de Juan, María José; Quintana Toledo, José María; Huertas Sánchez, Gloria; Rueda Rueda, Adoración (Hindawi Publishing Corporation, 2000)
      The capabilities of the conceptual link between threshold gates and sorting networks are explored by implementing some ...
    • Artículo
      Icon

      Sorting networks implemented as νMOS circuits 

      Rodríguez Villegas, Esther; Quintana Toledo, José María; Avedillo de Juan, María José; Rueda Rueda, Adoración (Institute of Electrical and Electronics Engineers, 1998)
      A new realisation for n-input sorters is presented. Resorting to the neuron-MOS (νMOS) concept and to an adequate electrical scheme, a compact and efficient implementation is obtained.