Listar Artículos (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por autor "Huertas Díaz, José Luis"
Mostrando ítems 1-20 de 34
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1 V CMOS subthreshold log domain PDM
(Springer, 2003)A new CMOS circuit strategy for very low-voltage Pulse-Duration Modulators (PDM) is proposed. Optimization of voltage ...
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10mhz cmos ota-c voltage-controlled quadrature oscillator
(Institution of Engineering and Technology, 1989)A quadrature-type voltage-controlled oscillator with operational transconductance amplifiers and capacitors (OTA-C) is ...
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A Chaotic Switched-Capacitor Circuit for 1/f Noise Generation
(Institute of Electrical and Electronics Engineers, 1992)A switched-capacitor circuit is reported for the generation of 1 / fYnoise. The circuit is described by a chaotic first-order ...
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A CMOS analog adaptive BAM with on-chip learning and weight refreshing
(Institute of Electrical and Electronics Engineers, 1993)In this paper we will extend the transconductance-mode (T-mode) approach [1] to implement analog continuous-time neural ...
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A modular T-mode design approach for analog neural network hardware implementations
(Institute of Electrical and Electronics Engineers, 1992)A modular transconductance-mode (T-mode) design approach is presented for analog hardware implementations of neural networks. ...
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A new nonlinear time-domain op-amp macromodel using threshold functions and digitally controlled network elements
(Institute of Electrical and Electronics Engineers, 1988)A general-purpose nonlinear macromodel for the time-domain simulation of integrated circuit operational amplifiers (op ...
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A Programmable Neural Oscillator Cell
(Institute of Electrical and Electronics Engineers, 1989)A programmable analog neural oscillator cell architecture is presented. The proposed neuron circuit is of hysteretic neural ...
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A switched-capacitor broadband noise generator for CMOS VLSI
(Institution of Engineering and Technology, 1991)A switched-capacitor circuit is reported for the generation of broadband white noise in MOS VLSI. It is based on the ...
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Analog Neural Programmable Optimizers in CMOS VLSI Technologies
(Institute of Electrical and Electronics Engineers, 1992)A 3-μm CMOS IC is presented demonstrating the concept of an analog neural system for constrained optimization. A serial ...
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Chaos From Switched-Capacitor Circuits: Discrete Maps
(Institute of Electrical and Electronics Engineers, 1987)A special-purpose analog computer made of switched-capacitor circuits is presented for analyzing chaos and bifurcation ...
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Chaos in a Switched-Capacitor Circuit
(Institute of Electrical and Electronics Engineers, 1985)We report chaotic phenomena observed from a simple nonlinear switched-capacitor circuit. The experimentally measured ...
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Chaos via a piecewise-linear switch ed-capacitor circuit
(Institution of Engineering and Technology, 1987)A nonlinear switched-capacitor circuit that generates chaotic signals is reported. The circuit is described by a first-order ...
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Characterization and modeling of piezoelectric integrated micro speakers for audio acoustic actuation
(Hindawi Publishing Corporation, 2011)A study of circular piezoelectric micro speakers is presented for applications in the audio frequency range, including ...
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Circuits and Systems Letters: A Novel SC Oscillator
(Institute of Electrical and Electronics Engineers, 1984) -
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CMOS OTA-C high-frequency sinusoidal oscillators
(Institute of Electrical and Electronics Engineers, 1991)Several topology families are given to implement practical CMOS sinusoidal oscillators by using operational transconductance ...
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Current-Mode Techniques for the Implementation of Continuous- and Discrete-Time Cellular Neural Networks
(Institute of Electrical and Electronics Engineers, 1993)This paper presents a unified, comprehensive approach to the design of continuous-time (CT) and discrete-time (DT) ...
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Efficient realization of a threshold voter for self-purging redundancy
(Springer, 2001)The self-purging technique is not commonly used mainly due to the lack of practical implementations of its key component, ...
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Efficient state reduction methods for PLA-based sequential circuits
(Institute of Electrical and Electronics Engineers, 1992)Experiences with heuristics for the state reduction of finite-state machines are presented and two new heuristic algorithms ...
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Global design of analog cells using statistical optimization techniques
(Springer, 1994)We present a methodology for automated sizing of analog cells using statistical optimization in a simulation based approach. ...
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High-Frequency Design of the Wien-Bridge Oscillator Using Composite Amplifiers
(Institute of Electrical and Electronics Engineers, 1987)