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Ponencia
Non-ideal quantization noise shaping in switched-current bandpass ΣΔ modulators
(Institute of Electrical and Electronics Engineers, 1999)
This paper presents a systematic analysis of the major switched-current (SI) errors and their influence on the quantization noise shaping of SI BandPass SD Modulators (BPSDMs). Closed form equations are provided for the ...
Ponencia
An Embedded 12-bit 80MS/s A/D/A Interface for Power-Line Communications in 0.13μm Pure Digital CMOS Technology
(Institute of Electrical and Electronics Engineers, 2005)
This paper presents an embedded interface, comprising both A/D and D/A converters, which has been implemented in a 0.13μm pure digital CMOS technology. The interface is integrated in a system for high-performance broad-band ...
Ponencia
A 0.35 μm CMOS 17-bit@40-kS/s cascade 2-1 ΣΔ modulator with programmable gain and programmable chopper stabilization
(The International Society for Optical Engineering - SPIE, 2005)
This paper describes a 0.35μm CMOS chopper-stabilized Switched-Capacitor 2-1 cascade ΣDelta; modulator for automotive sensor interfaces. For a better fitting to the characteristics of different sensor outputs, the modulator ...
Ponencia
Study of Non-Linear S/H Operation in Switched-Current Circuits Using Volterra Series - Application to BandPass Sigma-Delta Modulators
(2001)
This paper analyses the transient behaviour of SwItched-current (SI) memory cells placed at the front-end of high-speed A/D interfaces. Based on the Volterra series method, the non-linear sampling process occurring in ...
Ponencia
Top-Down Design of a xDSL 14-bit 4MSh ZA Modulator in Digital CMOS Technology
(Institute of Electrical and Electronics Engineers, 2001)
This paper describes the design of a Sigma-Delta modulator aimed for A/D conversion in xDSL applications, featuring 14-bit@4Msample/s in a 0.35μm mainstream digital CMOS technology. Architecture selection, modulator sizing ...
Artículo
A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators
(Institute of Electrical and Electronics Engineers, 2006)
This brief presents an efficient method for synthesizing cascaded sigma–delta modulators implemented with continuous-time circuits. It is based on the direct synthesis of the whole cascaded architecture in the continuous-time ...
Artículo
A CMOS 0.8 μm fully differential current mode buffer for HF SI circuits
(Elsevier, 1998)
We present a high-frequency fully-differential current-mode buffer to interface off-chip currents with no significant degradation of the frequency response, and to measure current-mode ICs using standard equipment. It has ...
Artículo
Fourth-order cascade SC ΣΔ modulators: a comparative study
(Institute of Electrical and Electronics Engineers, 1998)
Fourth-order cascade ΣΔ modulators are very well suited for IC implementation using analog sampled-data circuits because of their robust, stable operation and their capability to achieve high resolution and wide bandwidth ...
Artículo
SMASH ΔΣ modulator with adderless feed-forward loop filter
(Wiley-Blackwell, 2017)
A novel cascade ΔΣ modulator, which combines the benefits of sturdy MASH (SMASH) topology and feed-forward loop filter, is presented. The proposed ΔΣ architecture is based on moving the power-hungry adder block from the ...
Artículo
Analysis of error mechanisms in switched-current Sigma-Delta modulators
(Springer, 2004)
This paper presents a systematic analysis of the major switched-current (SI) errors and their influence on the performance degradation of ΣΔ Modulators (ΣΔMs). The study is presented in a hierarchical systematic way. First, ...