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Mostrando ítems 551-560 de 597
Ponencia
Boundary cost optimization for Alternate Test
(Institute of Electrical and Electronics Engineers, 2015)
Alternate Test has demonstrated in the last decade that advanced machine-learning tools can leverage the accuracy gap between functional test and indirect, or model-based, test. If a regression approach is taken, a model ...
Ponencia
Towards a computational approach for collision avoidance with real-world scenes
(SPIE- The International Society for Optical Engineering, 2003)
In the central nervous systems of animals like pigeons and locusts, neurons were identified which signal objects approaching the animal on a direct collision course. In order to timely initiate escape behavior, these neurons ...
Ponencia
Integrated circuit blocks for a DCSK chaos radio
(Institute of Electrical and Electronics Engineers, 1998)
A proposal for an integrated digital communication system using a DCSK chaotic modulation scheme is presented. It is a point-to-point wireless system capable of supporting half-duplex real-time voice and low data rate ...
Artículo
All-MOS implementation of RC networks for time-controlled Gaussian spatial filtering
(Wiley-Blackwell, 2012)
This paper addresses the design and VLSI implementation of MOS-based RC networks capable of performing time-controlled Gaussian filtering. In these networks, all the resistors are substituted one by one by a single MOS ...
Artículo
AER image filtering architecture for vision-processing systems
(Institute of Electrical and Electronics Engineers, 1999)
A VLSI architecture is proposed for the realization of real-time two-dimensional (2-D) image filtering in an address-event-representation (AER) vision system. The architecture is capable of implementing any convolutional ...
Ponencia
Tool for fast mismatch analysis of analog circuits
(Institute of Electrical and Electronics Engineers, 1995)
A tool is presented that evaluates statistical deviations in performance characteristics of analog circuits, starting from statistical deviations in the technological parameters of MOS transistors. Performance is demonstrated ...
Artículo
A CMOS 0.8 μm fully differential current mode buffer for HF SI circuits
(Elsevier, 1998)
We present a high-frequency fully-differential current-mode buffer to interface off-chip currents with no significant degradation of the frequency response, and to measure current-mode ICs using standard equipment. It has ...
Ponencia
A 0.5 /spl mu/m CMOS CNN analog random access memory chip for massive image processing
(Institute of Electrical and Electronics Engineers, 1998)
An analog RAM has been designed to act as a cache memory for a CNN Universal Machine. Hence, all the non-standard chips are available for the CNN Chipset architecture. Time-multiplexed analog routines in the CNN processor ...
Ponencia
Event-driven sensing and processing for high-speed robotic vision
(Institute of Electrical and Electronics Engineers, 2014)
We present here an overview of a new vision paradigm where sensors and processors use visual information not represented by sequences of frames. Event-driven vision is inherently frame-free, ...
Artículo
Algorithm for efficient symbolic analysis of large analogue circuits
(Institution of Engineering and Technology, 1994)
An algorithm is presented that generates simplified symbolic expressions for the small-signal characteristics of large analogue circuits. The expressions are approximated while they are computed, so that only the most ...