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Mostrando ítems 1-10 de 32
Artículo
Compensation of PVT Variations in ToF Imagers with In-Pixel TDC
(MDPI, 2017)
The design of a direct time-of-flight complementary metal-oxide-semiconductor (CMOS) image sensor (dToF-CIS) based on a single-photon avalanche-diode (SPAD) array with an in-pixel time-to-digital converter (TDC) must ...
Artículo
A 515 nW, 0-18 dB programmable gain analog-to-digital converter for in-channel neural recording interfaces
(Institute of Electrical and Electronics Engineers, 2014)
This paper presents a low-area low-power Switched-Capacitor (SC)-based Programmable-Gain Analog-to-Digital Converter (PG-ADC) suitable for in-channel neural recording applications. The PG-ADC uses a novel implementation ...
Artículo
Reducing the Impact of Reverse Currents in Tunnel FET Rectifiers for Energy Harvesting Applications
(Institute of Electrical and Electronics Engineers, 2017)
RF to DC passive rectifiers can benefit from the superior performance at low voltage of tunnel transistors. They have shown higher power conversion efficiency (PCE) at low input power than Si FinFETs counterparts. In this ...
Ponencia
An ultra-low-power voltage-mode asynchronous WTA-LTA circuit
(Institute of Electrical and Electronics Engineers, 2013)
This paper presents an asynchronous mixed-signal WTA-LTA circuit conceived to carry out local minimummaximum indexing in massively parallel image processing arrays. The hardware is focused on energy-efficient operation. ...
Ponencia
Real-time single-exposure ROI-driven HDR adaptation based on focal-plane reconfiguration
(Society of Photo-Optical Instrumentation Engineers, 2015)
This paper describes a prototype smart imager capable of adjusting the photo-integration time of multiple regions of interest concurrently, automatically and asynchronously with a single exposure period. The operation is ...
Ponencia
DOE based high-performance gate-level pipelines
(Institute of Electrical and Electronics Engineers, 2014)
Domino dynamic circuits are widely used in critical parts of high performance systems. In this paper we show that in addition to the functional limitation associated to the noninverting behavior of domino gates, there ...
Ponencia
Exploring logic architectures suitable for TFETs devices
(Institute of Electrical and Electronics Engineers, 2017)
Tunnel transistors are steep subthreshold slope devices suitable for low voltage operation so being potential candidates to overcome the power density and energy inefficiency limitations of CMOS technology, which are ...
Artículo
Experimental Validation of a Two-Phase Clock Scheme for Fine-Grained Pipelined Circuits Based on Monostable to Bistable Logic Elements
(Institute of Electrical and Electronics Engineers, 2014)
Abstract: Research on fine-grained pipelines can be a way to obtain high-performance applications. Monostable to bistable (MOBILE) gates are very suitable for implementing gate-level pipelines, which can be achieved without ...
Artículo
A Low Noise Amplifier for Neural Spike Recording Interfaces
(Multidisciplinary Digital Publishing Institute, 2015)
This paper presents a Low Noise Amplifier (LNA) for neural spike recording applications. The proposed topology, based on a capacitive feedback network using a two-stage OTA, efficiently solves the triple trade-off between ...
Ponencia
Assessing application areas for tunnel transistor technologies
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Tunnel transistors are one of the most attractive steep subthreshold slope devices currently being investigated as a means of overcoming the power density and energy inefficiency limitations of CMOS technology. In this ...