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Mostrando ítems 1-10 de 12
Artículo
Efficient state reduction methods for PLA-based sequential circuits
(Institute of Electrical and Electronics Engineers, 1992)
Experiences with heuristics for the state reduction of finite-state machines are presented and two new heuristic algorithms described in detail. Results on machines from the literature and from the MCNC benchmark set are ...
Ponencia
Architectures and building blocks for CMOS VLSI analog "neural" programmable optimizers
(Institute of Electrical and Electronics Engineers, 1992)
A modular reconfigurable serial architecture is presented for the analog/digital implementation of constrained optimization algorithms with digital programmability of the problem weights. Area overhead due to programmability ...
Artículo
Analog Neural Programmable Optimizers in CMOS VLSI Technologies
(Institute of Electrical and Electronics Engineers, 1992)
A 3-μm CMOS IC is presented demonstrating the concept of an analog neural system for constrained optimization. A serial time-multiplexed general-purpose architecture is introduced for the real-time solution of this kind ...
Ponencia
CMOS analog neural network systems based on oscillatory neurons
(Institute of Electrical and Electronics Engineers, 1992)
This paper addresses the design of two neural network systems based on the use of pulsing neurons. Each neuron is built as a simple voltage controlled oscillator (VCO) whose control voltage makes the circuit to oscillate ...
Ponencia
Modular analog continuous-time VLSI neural networks with on chip hebbian learning and analog storage
(Institute of Electrical and Electronics Engineers, 1992)
A modular analog circuit design approach for hardware implementations of neural networks is presented. This approach is based on the use of small transconductance multipliers as the main component, and is therefore called ...
Ponencia
A piecewise-linear function approximation using current mode circuits
(Institute of Electrical and Electronics Engineers, 1992)
A methodology to design currentmode circuits for piecewise-linear function approximation is presented. The technique is based on the utilization of current mirrors as basic building blocks. The resulting circuits are very ...
Artículo
A Chaotic Switched-Capacitor Circuit for 1/f Noise Generation
(Institute of Electrical and Electronics Engineers, 1992)
A switched-capacitor circuit is reported for the generation of 1 / fYnoise. The circuit is described by a chaotic first-order piecewise-finear discrete map which yields a hopping transition between regions of chaotic motions ...
Ponencia
1/f/sup y/ noise generation through a chaotic nonlinear switched-capacitor circuit
(Institute of Electrical and Electronics Engineers, 1992)
A programmable switched-capacitor circuit for the generation of 1/f/sup y/ noise is reported. The circuit is described by a chaotic first-order piecewise-linear finite-difference equation which yields a hopping transition ...
Ponencia
Switched-current techniques for image processing Cellular Neural Networks in MOS VLSI
(Institute of Electrical and Electronics Engineers, 1992)
An architecture and related building blocks are presented for the realization of image processing tasks using current-mode analog-digital circuits. The architecture is based on the Cellular Neural Network paradigm while ...
Artículo
A modular T-mode design approach for analog neural network hardware implementations
(Institute of Electrical and Electronics Engineers, 1992)
A modular transconductance-mode (T-mode) design approach is presented for analog hardware implementations of neural networks. This design approach is used to build a modular bidirectional associative memory network. The ...