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SMASH ΔΣ modulator with adderless feed-forward loop filter
(Wiley-Blackwell, 2017)
A novel cascade ΔΣ modulator, which combines the benefits of sturdy MASH (SMASH) topology and feed-forward loop filter, is presented. The proposed ΔΣ architecture is based on moving the power-hungry adder block from the ...
Ponencia
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The CNNUC3: an analog I/O 64x64 CNN universal machine chip prototype with 7-bit analog accuracy
(Institute of Electrical and Electronics Engineers, 2000)
This paper describes a full-custom mixed-signal chip which embeds distributed optical signal acquisition, digitally-programmable analog parallel processing, and distributed image memory (cache) on a common silicon substrate. ...
Ponencia
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Hardware Implementation of a Biometric Recognition Algorithm based on In-Air Signature
(IEEE, 2015-06-01)
This paper presents the design of a prototype for a wearable device that implements a recognition system based on in-air signature into a FPGA that receives data from a 3-axis accelerometer. The Dynamic Time Warping (DTW) ...
Ponencia
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Non-recursive method for motion detection from a compressive-sampled video stream
(Institute of Electrical and Electronics Engineers, 2016)
This paper introduces a non-recursive algorithm for motion detection directly from the analysis of compressed samples. The objective of this research is to create an algorithm able to detect, in real-time, the presence of ...
Ponencia
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A CMOS 8×8 SPAD array for Time-of-Flight measurement and light-spot statistics
(Institute of Electrical and Electronics Engineers, 2013)
The design and simulation of a CMOS 8 × 8 single photon avalanche diode (SPAD) array is presented. The chip has been fabricated in a 0.18μm standard CMOS technology and implements a double functionality: measuring the ...
Artículo
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Electrical pulse stimulation parameters modulate N2a neuronal differentiation
(Springer Nature, 2024-01-25)
Electrical pulse stimulation has been used to enhance the differentiation or proliferation of neuronal progenitor cells in tissue engineering and cancer treatment. Therefore, a comprehensive investigation of the effects ...
Artículo
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A CMOS-compatible oscillation-based VO2 Ising machine solver
(Springer Nature, 2024-04-18)
Phase-encoded oscillating neural networks offer compelling advantages over metal-oxide-semiconductor-based technology for tackling complex optimization problems, with promising potential for ultralow power consumption and ...
Ponencia
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Learning in neuro/fuzzy analog chips
(Institute of Electrical and Electronics Engineers, 1995)
This paper focus on the design of adaptive mixed-signal fuzzy chips. These chips have parallel architecture and feature electrically-controlable surface maps. The design methodology is based on the use of composite transistors ...
Artículo
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A Low-Power Programmable Neural Spike Detection Channel With Embedded Calibration and Data Compression
(Institute of Electrical and Electronics Engineers, 2012)
This paper reports a programmable 400 μm pitch neural spike recording channel, fabricated in a 130 nm standard CMOS technology, which implements amplification, filtering, digitization, analog spike detection plus feature ...