• Artículo
      Icon

      1 V CMOS subthreshold log domain PDM 

      Serra Graells, Francesc; Huertas Díaz, José Luis (Springer, 2003)
      A new CMOS circuit strategy for very low-voltage Pulse-Duration Modulators (PDM) is proposed. Optimization of voltage ...
    • Ponencia
      Icon

      Design of a 1.2-V 130nm CMOS 13-bit@40MS/s Cascade 2-2-1 Continuous-Time ΣΔ Modulator 

      Tortosa Navas, Ramón; Aceituno Marchena, Antonio; Rosa Utrera, José Manuel de la; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006)
      This paper presents the design of a continuous- time multibit cascade 2-2-1 ΣΔ modulator for broadband telecom systems. ...
    • Artículo
      Icon

      Low-voltage CMOS log-companding techniques for audio applications 

      Serra Graells, Francesc; Rueda Rueda, Adoración; Huertas Díaz, José Luis (Springer, 2004)
      This paper presents a collection of novel current-mode circuit techniques for the integration of very low-voltage (down ...