ListarInstituto de Microelectrónica de Sevilla (IMSE-CNM) por materia "Address event representation (AER)"
Mostrando ítems 1-3 de 3
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Artículo
A 32 x 32 Pixel Convolution Processor Chip for Address Event Vision Sensors With 155 ns Event Latency and 20 Meps Throughput
(IEEE Computer Society, 2011)This paper describes a convolution chip for event-driven vision sensing and processing systems. As opposed to conventional ...
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Artículo
Fast Predictive Handshaking in Synchronous FPGAs for Fully Asynchronous Multisymbol Chip Links: Application to SpiNNaker 2-of-7 Links
(Institute of Electrical and Electronics Engineers, 2016)Asynchronous handshaken interchip links are very popular among neuromorphic full-custom chips due to their delay-insensitive ...
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Artículo
On Real-Time AER 2-D Convolutions Hardware for Neuromorphic Spike-Based Cortical Processing
(IEEE Computer Society, 2008)In this paper, a chip that performs real-time image convolutions with programmable kernels of arbitrary shape is ...