Browsing Instituto de Microelectrónica de Sevilla (IMSE-CNM) by Author "Domínguez Castro, Rafael"
Now showing items 41-58 of 58
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Presentation
Mismatch-induced tradeoffs and scalability of mixed-signal vision chips
(Institute of Electrical and Electronics Engineers, 2002)This paper explores different trade-offs associated with the design of analog VLSI chips. These trade-offs are related to ...
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Presentation
Mixed-signal CNN array chips for image processing
(The International Society for Optical Engineering, 1996)Due to their local connectivity and wide functional capabilities, cellular nonlinear networks (CNN) are excellent candidates ...
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Presentation
Object oriented image segmentation on the CNNUC3 chip
(Institute of Electrical and Electronics Engineers, 2000)We show how a complex object oriented image analysis algorithm can be implemented on a CNNUM chip for video-coding. Besides ...
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Presentation
Programmable resolution imager for imaging applications
(SPIE- The International Society for Optical Engineering, 2000)In this paper a programmable imager with averaging capabilities will be described which is intended for averaging of ...
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Presentation
Programmable retinal dynamics in a CMOS mixed-signal array processor chip
(The International Society for Optical Engineering - SPIE, 2003)The low-level image processing that takes place in the retina is intended to compress the relevant visual information to ...
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Presentation
Realization of a CNN universal chip in CMOS technology
(Institute of Electrical and Electronics Engineers, 1995)This paper describes the design of a programmable Cellular Neural Network (CNN) chip, with additional functionalities ...
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Presentation
Realization of non-linear templates using the CNNUC3 prototype
(Institute of Electrical and Electronics Engineers, 2000)Demonstrates the processing capabilities of an analog programmable array processor chipMINUS/CNNUC3-which follows the ...
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Article
Robust high-accuracy high-speed continuous-time CMOS current comparator
(Institution of Engineering and Technology, 1997)The authors present a CMOS current comparator which employs nonlinear negative feedback to obtain high-accuracy (down to ...
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Article
Second-order neural core for bioinspired focal-plane dynamic image processing in CMOS
(Institute of Electrical and Electronics Engineers, 2004)Based on studies of the mammalian retina, a bioinspired model for mixed-signal array processing has been implemented on ...
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Article
SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips
(Wiley-Blackwell, 1999)This paper presents SIRENA, a CAD environment for the simulation and modelling of mixed-signal VLSI parallel processing ...
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Presentation
SIRENA: A simulation environment for CNNs
(Institute of Electrical and Electronics Engineers, 1994)SIRENA is a general simulation environment for artificial neural networks, with emphasis towards CNNs. A special interest ...
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Article
Smart-Pixel Cellular Neural Networks in Analog Current-Mode CMOS Technology
(Institute of Electrical and Electronics Engineers, 1994)This paper presents a systematic approach to design CMOS chips with concurrent picture acquisition and processing capabilities. ...
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Presentation
Some design trade-offs for large CNN chips using small-size transistors
(Institute of Electrical and Electronics Engineers, 1997)Small-size MOS transistors (MOST) exhibit a bunch of second-order effects which limit their application to design Cellular ...
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Presentation
Structure reconfigurability of the CNNUC3 for robust template operation
(Institute of Electrical and Electronics Engineers, 2000)We demonstrate the importance of the reconfigurability of a 64/spl times/64 cells size CNN-UM chip. As we show, in such a ...
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Article
Switched-capacitor neural networks for linear programming
(Institution of Engineering and Technology, 1988)A circuit for online solving of linear programming problems is presented. The circuit uses switched-capacitor techniques ...
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Presentation
Switched-current techniques for image processing Cellular Neural Networks in MOS VLSI
(Institute of Electrical and Electronics Engineers, 1992)An architecture and related building blocks are presented for the realization of image processing tasks using current-mode ...
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Presentation
The CNNUC3: an analog I/O 64x64 CNN universal machine chip prototype with 7-bit analog accuracy
(Institute of Electrical and Electronics Engineers, 2000)This paper describes a full-custom mixed-signal chip which embeds distributed optical signal acquisition, digitally-programmable ...
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Presentation
Weight-control strategy for programmable CNN chips
(Institute of Electrical and Electronics Engineers, 1994)This paper describes a hybrid weight-control strategy for the VLSI realization of programmable CNNs, based on automatic ...