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dc.creatorMárquez Alcaide, Abrahames
dc.creatorWang, Xuchenes
dc.creatorYan, Haoes
dc.creatorLeón Galván, José Ignacioes
dc.creatorMonopoli, Vito Giuseppees
dc.creatorButicchi, Giampaoloes
dc.creatorVázquez Pérez, Sergioes
dc.creatorLiserre, Marcoes
dc.creatorGarcía Franquelo, Leopoldoes
dc.date.accessioned2021-05-20T15:23:13Z
dc.date.available2021-05-20T15:23:13Z
dc.date.issued2021
dc.identifier.citationMárquez Alcaide, A., Wang, X., Yan, H., I. León, J., Monopoli, V.G., Buticchi, G.,...,García Franquelo, L. (2021). Common-Mode Voltage Mitigation of Dual Three-Phase Voltage Source Inverters in a Motor Drive Application. IEEE Access, 9, 67477-67487.
dc.identifier.issn2169-3536es
dc.identifier.urihttps://hdl.handle.net/11441/109127
dc.description.abstractElectric variable speed drives (VSDs) based on two VSDs connected to a multiphase machine are an attractive solution to replace high-power mechanic and hydraulic systems in many sectors of industry and transportation because they present high performance with reduced cost, volume and weight. Among the causes which affect the reliability of dual VSDs, the common-mode current flowing through the machine bearing is an important issue. This paper faces the mitigation of the common-mode current by reducing the common-mode voltage (CMV) generated by the operation of a dual VSD. The CMV reduction is carried out without introducing any extra device and/or passive filtering method. This CMV reduction is performed by applying a specific phase-displacement between the modulation strategies of each single inverter drive. The proposed technique has been evaluated in a down scaled experimental setup in order to test its effectiveness.es
dc.description.sponsorshipH2020 Spartan 821381es
dc.description.sponsorshipMinisterio de Ciencia e Innovación (España) TEC2016-78430-Res
dc.description.sponsorshipOficina de Ciencia y Tecnología de Ningbo 2018B10082es
dc.description.sponsorshipConsejería de Economía, Conocimiento, Empresas y Universidad / Secretaría General de Universidades, Investigación y Tecnología PY18-1340es
dc.formatapplication/pdfes
dc.format.extent11 p.es
dc.language.isoenges
dc.publisherInstitute of Electrical and Electronics Engineers IEEEes
dc.relation.ispartofIEEE Access, 9, 67477-67487.
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectHarmonic analysises
dc.subjectPulse width modulationes
dc.subjectCommon-mode voltagees
dc.titleCommon-Mode Voltage Mitigation of Dual Three-Phase Voltage Source Inverters in a Motor Drive Applicationes
dc.typeinfo:eu-repo/semantics/articlees
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/publishedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Ingeniería Electrónicaes
dc.relation.projectID821381es
dc.relation.projectIDTEC2016-78430-Res
dc.relation.projectIDPY18-1340es
dc.relation.projectID2018B10082es
dc.identifier.doi10.1109/ACCESS.2021.3072967es
dc.journaltitleIEEE Accesses
dc.publication.volumen9es
dc.publication.initialPage67477es
dc.publication.endPage67487es

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