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Mostrando ítems 1-10 de 43
Ponencia
Design of a dual band-pass filter using modified folded stepped-impedance resonators
(Institute of Electrical and Electronics Engineers, 2009)
A folded stepped impedance resonator (SIR) modified by adding an inner quasi-lumped SIR stub is used as the basic block of a new configuration of dual band-pass filter. The main advantage of the proposed filter is to allow ...
Ponencia
A complete retargeting methodology for mixed-signal IC designs
(Institute of Electrical and Electronics Engineers, 2001)
In this paper, an efficient methodology to retargeting and reuse of embedded mixed-signal blocks is presented. Parametrized layout templates, accurate behavioral modeling of mixed-signal blocks, and appropriate mechanisms ...
Ponencia
NORFREA: An algorithm for non redundant fuzzy rule extraction
(Institute of Electrical and Electronics Engineers (IEEE), 2002)
This contribution presents a new algorithm (NORFREA) to select fuzzy rules from a grid partition of the input domain. Besides using an efficiency measure for the rules, this algorithm employs an heuristic technique ...
Ponencia
Asymmetric clock driver for improved power and noise performances
(IEEE Computer Society, 2007)
One of the most important sources of switching noise and power consumption in large VLSI circuits is the clock generation and distribution tree. This paper analyzes how the use of an asymmetric clock can be an ...
Ponencia
Experimental results on metamaterial simulation using SRR-loaded waveguides
(Institute of Electrical and Electronics Engineers, 2003)
The recently proposed Split Ring Resonator (SRR) - loaded waveguide as a simulator of a left-handed medium (LHM) is extended to the simulation of negative magnetic permeability media (NMPM) and used for the study of wave ...
Ponencia
Ponencia
XFSL: A tool for supervised learning of fuzzy systems
(2001)
This paper presents Xfsl, a tool for the automatic tuning of fuzzy systems using supervised learning algorithms. The tool provides a wide set of learning algorithms, which can be used to tune complex systems. An important ...
Ponencia
Nuevos algoritmos de clasificación integrados en Xfuzzy 3
(European Centre for Soft Computing, 2008)
E l entorno Xfuzzy 3 está formado por un amplio conjunto de herramientas dedicadas a dar soporte a las diferentes etapas del desarrollo de sistemas difusos. Entre estas herramientas se encuentra Xfdm , ...
Ponencia
Desarrollo de módulos-IP de controladores difusos para el diseño de sistemas empotrados sobre FPGAs
(Universidad Politécnica de Madrid, 2006)
En esta comunicación se describe el diseño de controladores basados en lógica difusa como módulos de Propiedad Intelectual (IP) compatibles con los sistemas de procesado disponibles en las familias de FPGAs de Xilinx. El ...
Ponencia
Gate-Level Simulation of CMOS Circuits Using the IDDM Model
(IEEE Computer Society, 2001)
Timing verification of digital CMOS circuits is a key point in the design process. In this contribution we present the extension to gates of the Inertial and Degradation Delay Model for logic timing simulation which is ...