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Ponencia
Bifurcation Diagrams in MOS-NDR Frequency Divider Circuits
(Instituto Nacional de Astrofísica, Óptica y Electrónica; Universidad de Sevilla, 2012-03)
The behavior of a circuit able to implement frequency division is studied. It is composed of a block with an IV characteristic exhibiting Negative Differential Resistance (NDR) built from MOS transistors plus an inductor ...
Artículo
Suggested Readings in Continuum Mechanics and Earthquake Seismology
(Seismological Society of America, 2009-05)
Rotational seismology is a newly emerging field of interest to scientists from widely differing disciplines.We compile here some suggested readings for those wishing to become familiar with disciplines relevant to rotational ...
Artículo
A self-powered asynchronous image sensor with TFS operation
(Institute of Electrical and Electronics Engineers Inc., 2023-04-01)
This article presents a self-powered image sensor with a novel pixel architecture with energy harvesting capabilities. Pixels are autonomous entities that can harvest or sense illumination independently. Pixels have a fully ...
Artículo
Efficient realisation of MOS-NDR threshold logic gates
(Wiley Open Access, 2009-11-05)
A novel realisation of inverted majority gates based on a programmable MOS-NDR device is presented. A comparison, in terms of area and power consumption, has been performed to demonstrate that the proposed circuit is ...
Artículo
Alternate test of LNAs through ensemble learning of on-chip digital envelope signatures
(Springer, 2011-01-06)
This paper presents a novel and low-cost methodology for testing embedded Low Noise Amplifiers (LNAs). It is based on the detection and analysis of the response envelope of the Device Under Test (DUT) to a two-tone input ...
Artículo
Improved nanopipelined RTD adder using generalized threshold gates
(Institute of Electrical and Electronics Engineers, 2011)
Many logic circuit applications of Resonant Tunneling Diodes are based on the MOnostable-BIstable Logic Element (MOBILE). Threshold logic is a computational model widely used in the design of MOBILE circuits, i.e. these ...
Artículo
Performance assessment of deep learning frameworks through metrics of CPU hardware exploitation on an embedded platform
(J.J. Strossmayer University of Osijek, 2020)
In this paper, we analyze heterogeneous performance exhibited by some popular deep learning software frameworks for visual inference on a resource-constrained hardware platform. Benchmarking of Caffe, OpenCV, TensorFlow, ...
Artículo
A 4.2–13.2 V, on-chip, regulated, DC–DC converter in a standard 1.8V/3.3V CMOS process
(Elsevier, 2023)
This paper presents a fully on-chip HV-regulated DC–DC boost converter for the power management unit of an electrical neural stimulator. The core of the DC–DC converter consists of a 4x4 array of individually-configurable ...
Ponencia
Dedicated Hardware IP Module for Fingerprint Recognition
(IEEE, 2015-08-06)
This work presents a dedicated hardware IP module for fingerprints recognition based on a feature, named QFingerMap, which is very suitable for VLSI design. FPGA implementation results of the IP module are given. A ...
Artículo
A Fully Integrated, Power-Efficient, 0.07–2.08 mA, High-Voltage Neural Stimulator in a Standard CMOS Process
(MDPI, 2022)
This paper presents a fully integrated high-voltage (HV) neural stimulator with on-chip HV generation. It consists of a neural stimulator front-end that delivers stimulation currents up to 2.08 mA with 5 bits resolution ...