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Artículo
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Compensation of PVT Variations in ToF Imagers with In-Pixel TDC
(MDPI, 2017)
The design of a direct time-of-flight complementary metal-oxide-semiconductor (CMOS) image sensor (dToF-CIS) based on a single-photon avalanche-diode (SPAD) array with an in-pixel time-to-digital converter (TDC) must ...
Artículo
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A Wide Linear Dynamic Range Image Sensor Based on Asynchronous Self-Reset and Tagging of Saturation Events
(Institute of Electrical and Electronics Engineers, 2017)
We report a high dynamic range (HDR) image sensor with a linear response that overcomes some of the limitations of sensors with pixels with self-reset operation. It operates similar to an active pixel sensor, but its pixels ...
Ponencia
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Wide range 8ps incremental resolution time interval generator based on FPGA technology
(Institute of Electrical and Electronics Engineers, 2014)
Accurate generation of picosecond-resolution wide-range time intervals has become a necessity for the characterization of time-to-digital converters involved in time resolved imaging. This paper presents the design and ...
Ponencia
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Digital processor array implementation aspects of a 3D multi-layer vision architecture
(Institute of Electrical and Electronics Engineers, 2010)
Technological aspects of the 3D integration of a multilayer combined mixed-signal and digital sensor-processor array chip is described. The 3D integration raises the question of signal routing, power distribution, and heat ...
Artículo
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A CMOS Digital SiPM With Focal-Plane Light-Spot Statistics for DOI Computation
(Institute of Electrical and Electronics Engineers, 2017)
Silicon photomultipliers can be used to infer the depth-of-interaction (DOI) in scintillator crystals. DOI can help to improve the quality of the positron emission tomography images affected by the parallax error. This ...
Artículo
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Ultralow-power processing array for image enhancement and edge detection
(Institute of Electrical and Electronics Engineers, 2012)
This paper presents a massively parallel processing array designed for the 0.13-μm 1.5-V standard CMOS base process of a commercial 3-D through-silicon via stack. The array, which will constitute one of the fundamental ...
Ponencia
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Low-Noise and High-Efficiency Near-IR SPADs in 110nm CIS Technology
(Institute of Electrical and Electronics Engineers, 2019)
Photon detection at longer wavelengths is much desired for LiDAR applications. Silicon photodiodes with deeper junctions and larger multiplication regions are in principle more sensitive to near-IR photons. This paper ...
Artículo
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A 3-D Chip Architecture for Optical Sensing and Concurrent Processing
(SPIE, 2010)
This paper presents an architecture for the implementation of vision chips in 3-D integration technologies. This architecture employs the multi-functional pixel concept to achieve full parallel processing of the information ...
Ponencia
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Real-time remote reporting of motion analysis with Wi-Flip
(Institute of Electrical and Electronics Engineers, 2012)
This paper describes a real-time application programmed into Wi-FLIP, a wireless smart camera resulting from the integration of FLIP-Q, a prototype mixed-signal focal-plane array processor, and Imote2, a commercial WSN ...
Patente
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Sensor de imágenes
(Oficina Española de Patentes y Marcas , 2018-10-03)
Sensor de imágenes.El objeto de la invención es un sensor de imágenes (100) con muestreo compresivo "on-chip" para la captura, comprensión y transmisión de imágenes completas. Más concretamente, este sensor de imágenes ...